HT9480(1998) 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT9480
(Rev.:1998)

Pager Controller

Holtek Semiconductor 

HT9480

NO. Interrupt Source Priority Vector

Data ready

a

interrupt and

battery fail

interrupt

1

04H

c

Programmable

timer interrupt

2

08H

d

Timer/event

counter overflow

3

0CH

The programmable timer interrupt request flag

(T0F), timer/event counter interrupt request

flag (T1F), data ready interrupt and battery fail

interrupt request flag (EIF), enable timer/event

counter bit (ET1I), enable data ready interrupt

bit (EEI), and enable programmable timer in-

terrupt bit (ET0I) make up the register INTC

which is located at 0BH in the data memory.

The EEI, ET0I, ET1I, and EMI bits are all used

to control the enable/disable status of the inter-

rupts, preventing the requested interrupt from

being serviced. Once the interrupt request flags

(T0F, T1F, and EIF) are set, they will remain in

the INTC register until the interrupts are serv-

iced or cleared by a software instruction.

A “CALL subroutine” in the interrupt subrou-

tine should be used. This is because interrupts

often occur in an unpredictable manner or need

to be immediately serviced in some applica-

tions. During this time, if only one stack is left,

and enabling the interrupt is not well control-

led, the operation of a “CALL subroutine” in the

interrupt service routine is quite likely to upset

the original control sequence.

Oscillator configuration

The system core and the pager subsystem of the

HT9480 are clocked by different oscillators. The

system oscillator can be either a crystal or an

RC type. The subsystem low power oscillator, on

the other hand, is a crystal type which is de-

signed with the power on start-up function to

reduce the stabilization time of the oscillator.

This start-up function is enabled by PC2 which

is initially set high at power on reset, and

should be cleared so as to enable the low-power

oscillator function. The oscillator configuration

is running in the low power mode.

Low power oscillator

The system oscillator can be configured as

either an RC or crystal type of oscillator, deter-

mined by mask option. No matter what kind of

oscillator type is selected, the signal provides a

system clock. The system clock may also be

externally connected. The HALT mode stops

the system oscillator and ignores external sig-

nals to conserve power.

If the system oscillator is an RC type oscillator,

an external resistor between OSC1 and OSC2 is

required. The system clock is available on

OSC2, which can be used to synchronize exter-

nal logic. An RC oscillator provides the most

cost-effective solution. The frequency of oscilla-

tion may vary with power, temperature, and the

chip itself due to process variations. The RC

oscillator is, therefore, not suitable for timing

sensitive operations where an accurate oscilla-

tor frequency is desired.

On the other hand, if a crystal type oscillator is

used, a crystal across OSC1 and OSC2 is re-

quired to provide the feedback and phase shift

for oscillation, and no other external compo-

nents are required. A ceramic resonator can

replace the crystal connected between OSC1

and OSC2 to derive a frequency reference. In

this case, two external capacitors at OSC1 and

OSC2 are required.

14

23th Feb ’98

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