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NJU6475B 데이터 시트보기 (PDF) - Japan Radio Corporation

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NJU6475B Datasheet PDF : 45 Pages
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NJU6475B
(2) Power on Initialization by internal circuits
(2-1) Internal Reset circuits Initialization
The NJU6475B is automatically initialized by internal power on initialization circuits when the power is turned
on. In the internal power on initialization, following instructions are executed.
During the Internal power on initialization, the busy flag (BF) is "1" and this status is kept during 6ms
(fOSC=180KHz) after VDD rose to 2.4V.
Initialization sequence
Set Function
PD=1 : Power down OFF
Contrast Control
Set (00)H to the contrast register
Display ON/OFF
Control
Set Mode Entry
D=0 : Display OFF
C=0 : Cursor OFF
B=0 : Cursor Blink OFF
I/D=1 : Increment by 1
S=0 : Non shift
Clear Display
END
Note : If the condition of power supply rise time described in the Electrical Characteristics is not satisfied, the
internal Power On Initialization will not performed.
In this case, the software initialization by MPU is required.
(2-2) Hardware Initialization
The NJU6475B prepares RESET terminal to initialize the all system.
When the "L" level is input over 1.2ms to the RESET terminal, reset sequence is executed. In this time, the
busy signal is output during 6ms (fOSC=180KHz) after RESET terminal went to "H".
-Timing Chart
Over 1.2ms
External Reset
Signal
6ms
BUSY

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