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NJU6475B 데이터 시트보기 (PDF) - Japan Radio Corporation

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NJU6475B Datasheet PDF : 45 Pages
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NJU6475B
(i) Set RAM Address
RS
Code 0
R/W
0
DB7 DB6 DB5 DB4
1 AAA
Higher order bit
DB3 DB2 DB1 DB0
AAAA
Lower order bit
The RAM address set instruction is executed when the code "1" is written into DB7 and the address is
written into DB6 to DB0 as shown above.
The address data (DB6 to DB0) is written into the address counter (AC) by this instruction.
After this instruction execution, the data writing/reading is performed into/from the addressed RAM.
The RAM includes DD RAM, CG RAM and MK RAM and these RAMs are shared by addressed as shown
below.
RAM Address
DD RAM
DD RAM
DD RAM
DD RAM
CG RAM
MK RAM
1st Line :
2nd Line :
3rd Line :
4th Line :
4 Characters :
128 Icons :
(00)H to (0B)H
(10)H to (1B)H
(20)H to (2B)H
(30)H to (3B)H
(40)H to (5F)H
(60)H to (7F)H
(j) Write Data to CG, DD or MK RAM
-Write Data to DD RAM
RS
Code 1
R/W
0
DB7 DB6 DB5 DB4
DDDD
Higher order bit
DB3 DB2 DB1 DB0
DDDD
Lower order bit
-Write Data to CG or MK RAM
RS
Code 1
R/W
0
DB7 DB6 DB5 DB4
*
*
*
D
Higher order bit
DB3 DB2 DB1 DB0
DDDD
Lower order bit
*= Don't Care
Write Data to RAM instruction is executed when the code "1" is written into (RS) and code "0" is written into
(R/W).
By the execution of this instruction, the data is written into RAM. The selection of RAM is determined by the
previous instruction.
After this instruction execution, the address increment (+1) or decrement (-1) is performed automatically
according to the entry mode set.

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