28F004B5 데이터 시트보기 (PDF) - Intel
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28F004B5 Datasheet PDF : 38 Pages
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E
SMART 5 BOOT BLOCK MEMORY FAMILY
Table 3. Bus Operations for Word-Wide Mode (BYTE# = VIH)
Mode
Notes RP# CE# OE# WE# A9
A0
VPP
Read
1,2,3 VIH
VIL
VIL
VIH
X
X
X
Output Disable
VIH
VIL
VIH
VIH
X
X
X
Standby
VIH
VIH
X
X
X
X
X
Deep Power-Down
9
VIL
X
X
X
X
X
X
Intelligent Identifier
(Mfr.)
4
VIH
VIL
VIL
VIH
VID
VIL
X
Intelligent Identifier
4,5
VIH
VIL
VIL
VIH
VID
VIH
X
(Device)
Write
6,7,8 VIH
VIL
VIH
VIL
X
X
X
DQ0–15
DOUT
High Z
High Z
High Z
0089 H
See
Table 4
DIN
Mode
Read
Output
Disable
Note
1,2,3
Table 4. Bus Operations for Byte-Wide Mode (BYTE# = VIL)
RP# CE# OE# WE# A9
A0
A–1 VPP DQ0–7
VIH
VIL
VIL
VIH
X
X
X
X
DOUT
VIH
VIL
VIH
VIH
X
X
X
X High Z
DQ8–14(10)
High Z
High Z
Standby
Deep
Power-
Down
VIH
VIH
X
X
X
X
X
X High Z High Z
9
VIL
X
X
X
X
X
X
X High Z High Z
Intelligent
4
VIH
VIL
VIL
VIH
VID
VIL
X
X
89H
High Z
Identifier
(Mfr.)
Intelligent
4,5
VIH
VIL
VIL
VIH
VID
VIH
X
Identifier
(Device)
X
See
High Z
Table 4
Write
6,7,8 VIH
VIL
VIH
VIL
X
X
X
X
DIN
High Z
NOTES:
1. Refer to DC Characteristics.
2. X can be VIL, VIH for control pins and addresses, VPPLK or VPPH for VPP.
3. See DC Characteristics for VPPLK, VPPH1, VPPH2, VHH, VID voltages.
4. Manufacturer and device codes may also be accessed via a CUI write sequence, A0 selects, all other addresses = X.
5. See Table 4 for device IDs.
6. Refer to Table 6 for valid DIN during a write operation.
7. Command writes for block erase or program are only executed when VPP = VPPH1 or VPPH2.
8. To program or erase the boot block, hold RP# at VHH or WP# at VIH. See Section 3.3.
9. RP# must be at GND ± 0.2 V to meet the maximum deep power-down current specified.
10. This column does not apply to the E28F004B5 since it is a x8-only device.
ADVANCE INFORMATION
15
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