IMC020FLSA 데이터 시트보기 (PDF) - Intel
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IMC020FLSA Datasheet PDF : 39 Pages
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SERIES 2 FLASH MEMORY CARDS
READY-BUSY STATUS REGISTER
(Read Write Register)
ADDRESS
4134H
4132H
4130H
BIT 7
DEVICE
15
DEVICE
7
BIT 6
BIT 5
RESERVED
DEVICE
14
DEVICE
6
DEVICE
13
DEVICE
5
BIT 4
DEVICE
12
DEVICE
4
BIT 3
DEVICE
19
DEVICE
11
DEVICE
3
BIT 2
DEVICE
18
DEVICE
10
DEVICE
2
BIT 1
DEVICE
17
DEVICE
9
DEVICE
1
1 e DEVICE READY 0 e DEVICE BUSY
Figure 10 READY-BUSY STATUS REGISTER (Intel) Provides
Operation Status of All Flash Memory Devices
BIT 0
DEVICE
16
DEVICE
8
DEVICE
0
READY-BUSY MASK REGISTER
(INTEL)
The bits of the Read Write READY-BUSY MASK
REGISTER (Attribute Memory Plane Address
4120H–4124H Figure 11) mask out the correspond-
ing ‘‘AND-ed’’ READY-BUSY STATUS REGISTER
bits from the PCMCIA data bus (RDY BSY pin 16)
and the CARD STATUS REGISTER RDY BSY Bit
(bit 0)
In an unmasked condition (MASK REGISTER bits e
0) any device RY BY output going low pulls the
card’s RDY BSY output to VIL (BUSY) In this
case all devices must be READY to allow the card’s
RDY BSY output to be ready (VIH) This is referred
to as the PCMCIA READY-BUSY MODE An alter-
nate type of READY-BUSY function is described in
the next section READY-BUSY MODE REGISTER
READY-BUSY MASK
(Read Write Register)
ADDRESS
4124H
4122H
4120H
BIT 7
DEVICE
15
DEVICE
7
BIT 6
BIT 5
RESERVED
DEVICE
14
DEVICE
6
DEVICE
13
DEVICE
5
BIT 4
DEVICE
12
DEVICE
4
BIT 3
DEVICE
19
DEVICE
11
DEVICE
3
BIT 2
DEVICE
18
DEVICE
10
DEVICE
2
BIT 1
DEVICE
17
DEVICE
9
DEVICE
1
BIT 0
DEVICE
16
DEVICE
8
DEVICE
0
1 e MASK ENABLED
Figure 11 READY-BUSY MASK REGISTER (Intel) Essential for Write Optimization
14
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