MAX17409 데이터 시트보기 (PDF) - Maxim Integrated

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MAX17409

1-Phase Quick-PWM GPU Controller

Maxim Integrated 

PIN

7

8

9

10

11–16

17

18

19

20

21

1-Phase Quick-PWM GPU Controller

NAME

THRM

TON

PWRGD

SHDN

G0–G5

PGND

DL

VDD

BST

LX

Pin Description (continued)

FUNCTION

Comparator Input for Thermal Protection. THRM connects to the positive input of an internal

comparator. The comparator’s negative input connects to an internal resistive voltage-divider that

accurately sets the THRM threshold to 30% of the VCC voltage. Connect the output of a resistor-

divider and thermistor-divider (between VCC and GND) to THRM with the values selected so the

voltage at THRM falls below 30% of VCC (1.5V when VCC = 5V) at the desired high temperature.

Switching Frequency-Setting Input. An external resistor (RTON) between the input power source and

TON sets the switching frequency (fSW = 1/tSW) according to the following equation used to

determine the nominal switching period:

tSW = 16.3pF x (RTON + 6.5k
)

TON enters a high impedance in shutdown to reduce the input quiescent current. If the TON current

is less than 10µA, the MAX17409 disables the controller, sets the TON OPEN fault latch, and pulls

DH and DL low.

Open-Drain Power-Good Output. The MAX17409 forces PWRGD low when SHDN is pulled low. After

the controller is properly powered up, PWRGD becomes a high-impedance output as long as the

feedback voltage is in regulation and the startup blanking time has expired.

PWRGD becomes active 5ms after the MAX17409 reaches the VID target. The MAX17409 pulls

PWRGD low when shutdown (SHDN = GND) is pulled low, during startup, and during shutdown

transitions.

The PWRGD upper threshold is blanked during any downward output-voltage transition that occurs

when the MAX17409 is in skip mode (SKIP = VCC). PWRGD remains blanked until the transition-

related PWRGD blanking period expires and the controller detects the output is in regulation (error-

amplifier edge occurs).

Note: The pullup resistance on PWRGD causes additional shutdown current.

Shutdown Control Input. Connect to VCC for normal operation. Connect to ground to put the

controller into the low-power 1µA (max) shutdown state. During startup, the controller ramps up the

output voltage with a 1.56mV/µs slew rate to the selected target voltage. During the shutdown

transition, the MAX17409 softly ramps down the output voltage with a 1.56mV/µs slew rate. Forcing

SHDN to 11V ~ 13V disables overvoltage protection, undervoltage protection, and thermal

shutdown, and clears the fault latches.

Low-Voltage (1.0V Logic) VID DAC Code Inputs. The G0–G5 inputs do not have internal pullups.

These 1.0V logic inputs are designed to interface directly with the µP. The output voltage is set by

the DAC code indicated by the logic-level voltages on G0–G5.

Power Ground. Ground connection for the DL driver.

Low-Side Gate-Driver Output. DL swings from VDD to PGND. DL is forced low in shutdown. DL is

also forced low when an output overvoltage fault is detected, overriding any negative current-limit

condition that might be present. DL is forced low in skip mode after detecting an inductor current

zero crossing.

Driver-Supply Voltage Input. VDD supplies power to the low-side gate driver (DL) and to the internal

BST switch used to refresh the BST capacitor. Connect VDD to the 4.5V to 5.5V system supply

voltage. Bypass VDD to PGND with a 1µF or greater ceramic capacitor.

Boost Flying Capacitor Connection. BST provides the upper supply rail for the DH high-side gate

driver. An internal switch between VDD and BST charges the flying capacitor while the low-side

MOSFET is on (DL pulled high and LX pulled to ground).

Inductor Connection. LX serves as the lower supply rail for the DH high-side gate driver. The

MAX17409 also uses LX as the input to the zero-crossing comparator.

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