STK11C68 데이터 시트보기 (PDF) - Unspecified

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STK11C68

8K x 8 nvSRAM QuantumTrap™ CMOS Nonvolatile Static RAM

Unspecified 

STK11C68

SOFTWARE STORE/RECALL MODE SELECTION

E

W

L

H

A12 - A0 (hex)

0000

1555

0AAA

1FFF

10F0

0F0F

MODE

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Nonvolatile STORE

I/O

Output Data

Output Data

Output Data

Output Data

Output Data

Output High Z

NOTES

m

0000

Read SRAM

Output Data

1555

Read SRAM

Output Data

0AAA

Read SRAM

Output Data

L

H

1FFF

Read SRAM

Output Data

m

10F0

Read SRAM

Output Data

0F0E

Nonvolatile RECALL

Output High Z

Note m: The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.

SOFTWARE STORE/RECALL CYCLEn, o

(VCC = 5.0V ± 10%)b

NO. SYMBOLS

PARAMETER

STK11C68-20

MIN

MAX

STK11C68-25

MIN

MAX

STK11C68-35

MIN

MAX

STK11C68-45

MIN

MAX

UNITS

26

tAVAV

STORE/RECALL Initiation Cycle Time 20

25

35

45

ns

27

tAVELn

Address Set-up Time

0

0

0

0

ns

28

tELEHn

Clock Pulse Width

15

20

25

30

ns

29

tELAXn

Address Hold Time

15

20

20

20

ns

30

tRECALLn

RECALL Duration

20

20

20

20

µs

Note n:

Note o:

The software sequence is clocked with E controlled reads.

The six consecutive addresses must be in the order listed in the Software STORE/RECALL Mode Selection Table: (0000, 1555, 0AAA, 1FFF,

10F0, 0F0F) for a STORE cycle or (0000, 1555, 0AAA, 1FFF, 10F0, 0F0E) for a RECALL cycle. W must be high during all six consecutive

cycles.

SOFTWARE STORE/RECALL CYCLE: E Controlledo

ADDRESS

26

tAVAV

ADDRESS #1

26

tAVAV

ADDRESS #6

27

tAVEL

28

tELEH

E

DQ (DATA OUT)

29

tELAX

DATA VALID

/ 23

30

tSTORE tRECALL

DATA VALID

HIGH IMPEDANCE

June 1999

4-26

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