M95512-DR 데이터 시트보기 (PDF) - STMicroelectronics
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M95512-DR Datasheet PDF : 48 Pages
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M95512-W, M95512-R
Operating features
4.1.4
Power-down
During power-down (continuous decrease in VCC below the minimum VCC operating voltage
defined in Table 8 and Table 10), the device must be:
● deselected (Chip Select (S) should be allowed to follow the voltage applied on VCC)
● in Standby Power mode (that is there should not be any internal write cycle in
progress).
4.2
Active Power and Standby Power modes
When Chip Select (S) is low, the device is selected, and in the Active Power mode. The
device consumes ICC, as specified in Table 15.
When Chip Select (S) is high, the device is deselected. If a Write cycle is not currently in
progress, the device then goes in to the Standby Power mode, and the device consumption
drops to ICC1.
4.3
Hold condition
The Hold (HOLD) signal is used to pause any serial communications with the device without
resetting the clocking sequence.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be selected, with Chip Select (S) low.
Normally, the device is kept selected, for the whole duration of the Hold condition.
Deselecting the device while it is in the Hold condition, has the effect of resetting the state of
the device, and this mechanism can be used if it is required to reset any processes that had
been in progress.
The Hold condition starts when the Hold (HOLD) signal is driven low at the same time as
Serial Clock (C) already being low (as shown in Figure 6).
The Hold condition ends when the Hold (HOLD) signal is driven high at the same time as
Serial Clock (C) already being low.
Figure 6 also shows what happens if the rising and falling edges are not timed to coincide
with Serial Clock (C) being low.
Figure 6. Hold condition activation
C
HOLD
Hold
Condition
Hold
Condition
AI02029D
Doc ID 11124 Rev 13
13/48
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