AB28F400BR-B80 데이터 시트보기 (PDF) - Intel
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AB28F400BR-B80 Datasheet PDF : 36 Pages
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A28F200BR
E
3.1 Bus Operations
Flash memory reads, erases and programs in-
system via the local CPU. All bus cycles to or from
the flash memory conform to standard
microprocessor bus cycles. These bus operations
are summarized in Tables 2 and 3.
3.2 Read Operations
The boot block flash device has three user read
modes: array, intelligent identifier, and status
register. Status register read mode will be
discussed, in detail, in Section 3.3.2.
3.2.1
READ ARRAY
When RP# transitions from VIL (reset) to VIH, the
device will be in the read array mode and will
respond to the read control inputs (CE#, address
inputs, and OE#) without any commands being
written to the CUI.
When the device is in the read array mode, five
control signals must be controlled to obtain data at
the outputs.
• WE# must be logic high (VIH)
• CE# must be logic low (VIL)
• OE must be logic low (VIL)
• RP# must be logic high (VIH)
• BYTE# must be logic high or logic low.
In addition, the address of the desired location must
be applied to the address pins. Refer to Figures 10
and 11 for the exact sequence and timing of these
signals.
If the device is not in read array mode, as would be
the case after a program or erase operation, the
Read Mode command (FFH) must be written to the
CUI before reads can take place.
3.2.1.1
Output Control
With OE# at logic-high level (VIH), the output from
the device is disabled and data Input/Output pins
(DQ[0:15] or DQ[0:7]) are tri-stated.
3.2.1.2
Input Control
With WE# at logic-high level (VIH), input to the
device is disabled.
3.2.2
INTELLIGENT IDENTIFIERS
The intelligent identifiers of the SmartVoltage boot
block components are identical to the boot block
products that operate only at 12V VPP. The
manufacturer and device codes are read via the
CUI or by taking the A9 pin to VID. Writing 90H to
the CUI places the device into intelligent identifier
read mode. In this mode, A0 = 0 outputs the
manufacturer’s identification code and A0 = 1
outputs the device code. When BYTE# is at a logic
low, only the lower byte of the above signatures is
read and DQ15/A-1 is a “don’t care” during intelligent
identifier mode. See the table below for product
signatures. A Read Array command must be written
to the memory to return to the read array mode.
Table 4. Intelligent Identifier Table
Product Mfr. ID
Device ID
-T
-B
(Top Boot) (Bottom Boot)
28F200 0089 H 2274 H
2275 H
3.3 Write Operations
3.3.1
COMMAND USER INTERFACE (CUI)
The Command User Interface (CUI) serves as the
interface between the microprocessor and the
internal chip controller. Commands are written to
the CUI using standard microprocessor write
timings. The available commands are Read Array,
Read Intelligent Identifier, Read Status Register,
Clear Status Register, Program and Erase
(summarized in Tables 5 and 6). For Read
commands, the CUI points the read path at either
the array, the intelligent identifier, or the Status
Register depending on the command received. For
Program or Erase commands, the CUI informs the
Write State Machine (WSM) that a program or
erase has been requested. During the execution of
a Program command, the WSM will control the
programming sequences and the CUI will only
respond to status reads. During an erase cycle, the
12
ADVANCE INFORMATION
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