AB28F400BR-B80 데이터 시트보기 (PDF) - Intel
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AB28F400BR-B80 Datasheet PDF : 36 Pages
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A28F200BR
E
Command
Read Array
Intelligent Identifier
Read Status Register
Clear Status Register
Word/Byte Program
Alternate Word/Byte
Program
Block Erase/Confirm
Erase Suspend/Resume
Table 6. Command Bus Definitions
Notes
First Bus Cycle
8
Oper
Addr
Data
1
Write
X
FFH
2,4
Write
X
90H
3
Write
X
70H
Write
X
50H
6,7
Write
PA
40H
6,7
Write
PA
10H
Second Bus Cycle
Oper
Addr
Data
Read
IA
IID
Read
X
SRD
Write
PA
PD
Write
PA
PD
5
Write
BA
Write
X
20H
Write
BA
B0H
Write
X
D0H
D0H
ADDRESS
BA= Block Address
IA= Identifier Address
PA= Program Address
X= Don’t Care
DATA
SRD= Status Register Data
IID= Identifier Data
PD= Program Data
NOTES:
1. Bus operations are defined in Tables 2 and 3.
2. IA = Identifier Address: A0=0 for manufacturer code, A0=1 for device code.
3. SRD - Data read from Status Register.
4. IID = Intelligent Identifier Data. Following the Intelligent Identifier command, two Read operations access manufacturer and
device codes.
5. BA = Address within the block being erased.
6. PA = Address to be programmed. PD = Data to be programmed at location WD.
7. Either 40H or 10H commands is valid.
8. When writing commands to the device, the upper data bus [DQ8-DQ15] = X (28F200 only) which is either VCC or VSS, to
minimize current draw.
Program
The second write after the Program Setup
command, will latch addresses and data. Also, the
CUI initiates the WSM to begin execution of the
program algorithm. The device outputs Status
Register data when OE# is enabled. A Read Array
command is required after programming, to read
array data.
Erase Setup (20H)
Prepares the CUI for the Erase Confirm command.
No other action is taken. If the next command is not
an Erase Confirm command, then the CUI will set
both the Program Status and Erase Status bits of
the Status Register to a “1,” place the device into
the Read Status Register state, and wait for another
command.
14
ADVANCE INFORMATION
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