ALC202 데이터 시트보기 (PDF) - Unspecified

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ALC202

AC97 Audio CODEC

Unspecified 

Avance Logic, Inc.

6.1.3 S/PDIF output Characteristics:

Dvdd= 3.3V, Tambient=250C, with 75 ohm external load.

Parameter

Symbol Min

Typ

High level output voltage VOH

3.0

3.3

Low level output voltage VOL

-

0

6.2 AC Timing Characteristics

6.2.1 Cold Reset:

Parameter

Symbol Min

Typ

RESET# active low pulse width Trst_low 1.0

-

RESET# inactive to BIT_CLK Trst2clk 162.8

-

Startup delay

ALC202

Max

Units

V

0.5

V

Max

Units

-

us

-

ns

Fig 6.2.1-1 Cold reset timing diagram

6.2.2 Warm Reset:

Fig 6.2.2-1

Parameter

SYNC active high pulse width

SYNC inactive to BIT_CLK

Startup delay

Cold reset timing diagram

Symbol Min

Typ

Tsync_high

1.0

-

Tsync2clk 162.8

-

Max

Units

-

us

-

ns

6.2.3 AC-Link Clocks:

Fig 6.2.3-1 BIT_CLK and SYNC timing diagram

Parameter

Symbol Min Typ Max

BIT_CLK frequency

- 12.288 -

BIT_CLK period

BIT_CLK output jitter

Tclk_period

-

-

81.4

-

-

750

BIT_CLK high pulse width (note 2) Tclk_high 36

40.7

45

BIT_CLK low pulse width (note 2) Tclk_low 36

40.7

45

SYNC frequency

-

48.0

-

- 23 -

http://www.realtek.com.tw

Preliminary

Units

MHz

ns

ps

ns

ns

KHz

Rev0.62

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