AM29LV008T-120FC 데이터 시트보기 (PDF) - Advanced Micro Devices

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AM29LV008T-120FC

8 Megabit (1,048,576 x 8-Bit) CMOS 3.0 Volt-only, Sectored Flash Memory

Advanced Micro Devices 

PRELIMINARY

Table 6. Hardware Sequence Flags

Status

DQ7

DQ6

DQ5

DQ3

DQ2

RY/BY

Programming

DQ7

Toggle

0

0

No Toggle

0

Program/Erase in Auto-Erase

0

Toggle

0

1

(Note 1)

0

In Progress

Erase Erase Sector Address

Suspend

Mode Non-Erase Sector Address

1

No Toggle

0

Data

Data

Data

0

Toggle

(Note 1)

1

Data

Data (Note

2)

1

Program in Erase Suspend

DQ7

(Note 2)

Toggle

0

0

1

(Note 2)

0

Exceeded

Time Limits

Programming

Program/Erase in Auto-Erase

Program in Erase Suspend

DQ7

Toggle

1

0

Toggle

1

DQ7

Toggle

1

0

No Toggle

0

1

(Note 3)

0

0

No Toggle

0

Notes:

1. DQ2 can be toggled when the sector address applied is that of an erasing or erase suspended sector. Conversely, DQ2 cannot

be toggled when the sector address applied is that of a non-erasing or non-erase suspended sector. DQ2 is therefore used

to determine which sectors are erasing or erase suspended and which are not.

2. These status flags apply when outputs are read from the address of a non-erase-suspended sector.

3. If DQ5 is high (exceeded timing limits), successive reads from a problem sector will cause DQ2 to toggle.

DQ7: Data Polling

The Am29LV008 features DATA Polling as a method to

indicate to the host system that the embedded algo-

rithms are in progress or completed.

During the Embedded Program Algorithm, an attempt

to read the device will produce the compliment of the

data last written to DQ7. Upon completion of the Em-

bedded Program Algorithm, an attempt to read the de-

vice will produce the true data last written to DQ7. Note

that just at the instant when DQ7 switches to true data,

the other bits, DQ6–DQ0, may not yet be true data.

However, they will all be true data on the next read from

the device. Please note that Data Polling (DQ7) may

give an inaccurate result when an attempt is made

to write to a protected sector. During an Embedded

Erase Algorithm, an attempt to read the device will pro-

duce a ‘0’ at the DQ7 output. Upon completion of the

Embedded Erase Algorithm, an attempt to read

the device will produce a ‘1’ at DQ7.

For chip erase, the DATA Polling is valid (DQ7 = 1) after

the rising edge of the sixth WE pulse in the six write

pulse sequence. For sector erase, the DATA Polling is

valid after the last rising edge of the sector erase WE

pulse. DATA Polling must be performed at sector ad-

dresses within any of the sectors being erased and not

a sector that is within a protected sector. Otherwise, the

status may not be valid.

Just prior to the completion of Embedded Algorithm op-

erations, DQ7 may change asynchronously while the

output enable (OE) is asserted low. This means that the

device is driving status information on DQ7 at one in-

stant of time and in the next instance of time, that byte

has valid data. Depending on when the system sam-

ples the DQ7 output, it may read the status or valid

data. Even if the device has completed the Embedded

Algorithm operations and DQ7 has valid data, DQ0–

DQ6 may still provide write operation status. The valid

data on DQ0–DQ7 can be read on the next successive

read attempt.

The DATA Polling feature is only active during the Em-

bedded Programming Algorithm, Embedded Erase Al-

gorithm, Erase Suspend, erase suspend-program

mode, or sector erase time-out (see Table 6).

If the user attempts to write to a protected sector, DATA

Polling will be activated for about 1 µs; the device will

then return to read mode, with data from the protected

sector unchanged. If the user attempts to erase a pro-

tected sector, Toggle Bit will be activated for about 50

µs; the device will then return to read mode, without

having erased the protected sector.

See Figure 6 for the DATA Polling timing specifications

and diagrams.

DQ6: Toggle Bit

The Am29LV008 also features a “Toggle Bit” as a

method to indicate to the host system whether the em-

bedded algorithms are in progress or completed.

During an Embedded Program or Erase Algorithm,

successive attempts to read data from the device will

result in DQ6 toggling between one and zero. Once the

16

Am29LV008T/Am29LV008B

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