CDB5340(2006) 데이터 시트보기 (PDF) - Cirrus Logic

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CDB5340
(Rev.:2006)

101 dB, 192 kHz, Multi-Bit Audio A/D Converter

Cirrus Logic 

SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT

(Logic "0" = GND = 0 V; Logic "1" = VL, CL = 20 pF)

Parameter

Symbol Min

Typ

MCLK Specifications

MCLK Period

tclkw

39

-

78

-

MCLK Pulse Duty Cycle

40

-

Master Mode

SCLK falling to LRCK

Single-Speed tmslr

-20

-

Double-Speed

-20

-

Quad-Speed

-8

-

SCLK falling to SDOUT valid.

SCLK Duty Cycle.

tsdo

-

-

Single-Speed

-

50

Double-Speed

-

50

Quad-Speed

-

33

Slave Mode

Single-Speed (Note 11)

LRCK Duty Cycle

40

50

SCLK Period

SCLK Duty Cycle

tsclkw

156

-

45

50

SDOUT valid before SCLK rising

SDOUT valid after SCLK rising

SCLK falling to LRCK edge

Double-Speed (Note 11)

LRCK Duty Cycle

tstp

10

-

thld

5

-

tslrd

-20

-

40

50

SCLK Period

SCLK Duty Cycle

tsclkw

156

-

45

50

SDOUT valid before SCLK rising

SDOUT valid after SCLK rising

SCLK falling to LRCK edge.

Quad-Speed (Note 11)

LRCK Duty Cycle

tstp

10

-

thld

5

-

tslrd

-20

-

40

50

SCLK Period

SCLK Duty Cycle

tsclkw

78

-

29.7

33

SDOUT valid before SCLK rising

SDOUT valid after SCLK rising

SCLK falling to LRCK edge.

tstp

10

-

thld

5

-

tslrd

-8

-

11. For a description of speed modes, please refer to Table 1 on page 15.

CS5340

Max

45

1953

60

20

20

8

32

-

-

-

Unit

ns

ns

%

ns

ns

ns

ns

%

%

%

60

%

-

ns

55

%

-

ns

-

ns

20

ns

60

%

-

ns

55

%

-

ns

-

ns

20

ns

60

%

-

ns

50

%

-

ns

-

ns

8

ns

DS601F1

11

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