CXD1196 데이터 시트보기 (PDF) - Sony Semiconductor

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CXD1196

CD-ROM DECODER

Sony Semiconductor 

CXD1196AR

Description of Functions

1. Description of Pins

1.1 CD player interface

The CXD1196AR can be directly connected to digital signal processing LSIs for CD of Sony and other

company. The digital signal processing LSI for CD is referred to as a DSP for CD.

(1) DATA (DATA : Input)

Serial data stream from a CIRC LSI

(2) BCLK (Bit Clock : Input)

Bit clock signal for strobing DATA signal

(3) LRCK (LR Clock : Input)

LR clock signal indicating Lch and Rch of DATA signal

(4) C2PO (C2 Pointer : Input)

C2 pointer signal indicating that DATA input contains an error

(5) EMP (Emphasis : Input)

Emphasis indicating that the data from the DSP is emphasized. (positive logic signal)

1.2 Buffer memory interface

The CXD1196AR can be connected to a standard SRAM up to 32 Kbytes (256 Kbits).

(1) XMWR (BUFFER MEMORY WRITE : OUT)

Data write signal to buffer memory (strobe negative logic output)

(2) XMOE (BUFFER MEMORY OUTPUT ENABLE : OUT)

Data read signal to buffer memory (strobe negative logic output)

(3) MA0-14 (BUFFER MEMORY ADDRESS : OUT)

Address signals to buffer memory

(4) MDB0-7 (BUFFER MEMORY DATA BUS : BUS)

Buffer memory data bus signal pulled up by a typical 25 kΩ resistor

In an ADPCM decode playback drive, make sure that the CXD1196AR is connected to a 256 Kbit (8b ×

32 Kw, 32 Kbyte) SRAM

1.3 CPU interface

(1) XWR (CPU WRITE : Input)

Strobe signal for writing to register in chip (negative logic input)

(2) XRD (CPU READ : Input)

Strobe for reading out status of register chip (negative logic input signal)

(3) D0-7 (CPU DATA BUS : Input and output)

8-bit data bus

(4) A0 (CPU ADDRESS : Input)

CPU address signal for selecting internal register of the CXD1196AR

(5) INT (CPU INTERRUPT : Output)

Interrupt request output signal for CPU. The polarity of this signal can be controlled by the INTP pin.

(6) INTP (INTERRUPT POLARITY : Input)

This pin controls the polarity of the INT pin. In the IC, it is pulled up by a typical 50 kΩ register.

When INTP= ‘H’ or open, the INT pin goes low active.

When INTP= ‘L’ , the INT pin goes high active.

(7) XCS (CHIP SELECT : Input)

Chip select signal for CPU to select the CXD1196AR (negative logic input)

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