1024-Bit, 1-Wire EEPROM
FROM FIGURE 7a
55h
N
COPY SCRATCHPAD?
Y
BUS MASTER Tx
TA1 (T[7:0]), TA2 (T[15:8])
AND E/S BYTE
APPLICABLE TO ALL R/W
MEMORY LOCATIONS.
F0h
N
READ MEMORY?
Y
BUS MASTER Tx
TA1 (T[7:0]), TA2 (T[15:8])
AUTH. CODE
MATCH?
N
BUS MASTER
Rx "1"s
Y
Y
T[15:0] < 0090h?
ADDRESS < 90h?
Y
N
DS2431 SETS MEMORY
N
ADDRESS = (T[15:0])
N
PF = 0?
Y
DS2431
INCREMENTS
ADDRESS
COUNTER
BUS MASTER Rx
DATA BYTE FROM
MEMORY ADDRESS
Y
COPY PROTECTED?
N
Y
MASTER Tx RESET?
BUS MASTER
Rx "1"s
AA = 1
N
DS2431 COPIES
DURATION: tPROG
SCRATCHPAD
*
DATA TO ADDRESS
Y
ADDRESS < 8Fh?
N
N
MASTER Tx RESET?
Y
DS2431 Tx "0"
BUS MASTER
N
Rx "1"s
MASTER Tx RESET?
Y
N
MASTER Tx RESET?
Y
MASTER Tx RESET?
Y
N
DS2431 Tx "1"
TO FIGURE 7a
N
MASTER Tx RESET?
Y
* 1-Wire IDLE HIGH FOR POWER.
Figure 7b. Memory Function Flowchart (continued)
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