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DS2432 데이터 시트보기 (PDF) - Maxim Integrated

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DS2432 Datasheet PDF : 17 Pages
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ABRIDGED DATA SHEET
DS2432
64-BIT LASERED ROM
Each DS2432 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family
code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (See
Figure 3.) The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and
XOR gates as shown in Figure 4. The polynomial is X8 + X5 + X4 + 1. Additional information about the
1-Wire Cyclic Redundancy Check is available in Application Note 27. The shift register bits are
initialized to zero. Then starting with the least significant bit of the family code, one bit at a time is
shifted in. After the 8th bit of the family code has been entered, then the serial number is entered. After the
48th bit of the serial number has been entered, the shift register contains the CRC value. Shifting in the
eight bits of CRC should return the shift register to all zeros.
HIERARCHCAL STRUCTURE FOR 1-Wire PROTOCOL Figure 2
BUS
Master
1-Wire net
Other
Devices
Command
Level:
1-Wire ROM Function
Commands (see Figure 9)
DS2432
Available
Commands:
Read ROM
Match ROM
Search ROM
Skip ROM
Resume
Overdrive Skip
Overdrive Match
Data Field
Affected:
64-bit Reg. #, RC-Flag
64-bit Reg. #, RC-Flag
64-bit Reg. #, RC-Flag
RC-Flag
RC-Flag
RC-Flag, OD-Flag
64-bit Reg. #, RC-Flag, OD-Flag
DS2432-specific
Memory Function
Commands (see Figure 7)
For details see the full
version of the data sheet.
64-BIT LASERED ROM Figure 3
MSB
8-Bit CRC Code
48-Bit Serial Number
MSB
LSB MSB
LSB
8-Bit Family Code*
LSB MSB
LSB
*For the actual Family Code value, refer to the full version of the data sheet.
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