EL2021 데이터 시트보기 (PDF) - Intersil

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EL2021

Monolithic Pin Driver

Intersil 

EL2021

FIGURE 1. SIMPLIFIED OUTPUT STAGE (NORMAL MODE)

This circuit allows the external transistors to run from B+ and

B- supplies that are of less voltage than V+ and V- to

conserve power. Reducing B± supplies also reduces

dissipations in the output devices themselves. B+ is typically

made K volts more than VCH and B- made K volts more

negative than VCL. Ideally K is made as small as possible to

minimize output transistor dissipation, but two factors limit

how small K can be. These factors are both related to the

fact that transistors have two collector resistance numbers:

“hard” and “soft” saturation resistance. As a transistor begins

to saturate at high collector currents and small collector-

emitter voltages, minority carriers begin to be generated

from the base-collector junction. These carriers act as more

collector dopant and actually reduce effective series

collector resistance. At conditions of heavy saturation, the

collector is flooded with minority carriers and exhibits

minimum collector resistance. In this way, small geometry

transistors like the 2N2222 and 2N2907 devices have

excellent collector-emitter voltage drops at high currents, but

are actually still in heavy saturation for 1V-2V drops. This

“soft” saturation shows up as reduced beta at high currents

and moderate VCE's as well as very poor AC performance. A

transistor may exhibit an ft of only 2MHz in soft saturation

when, like the 2N2222, it gives 300MHz in non-saturated

mode. The EL2021 requires the output transistors to have an

ft of at least 200MHz to prevent degradation in overshoot,

slew rate into heavy loads, and tolerance of heavy output

capacitance. With a K of 3.2V and 1Ω collector resistors,

almost all 2N2222 and 2N2907 devices perform well, but we

have obtained devices from some vendors where the beta

does indeed fall prematurely at reduced VCE and high

currents. It is important to characterize the external devices

for the service that the EL2021 will be expected to provide.

The output stage of the EL2021 does not ring appreciably

into a capacitive load in quiescent conditions, but it does ring

while it slews. This is an unusual characteristic, but the

output slews monotonically and the slew “ripple” does not

cause problems in use. The slew ripple does cause a similar

“ripple” in the overshoot-vs-VSR characteristic: the

overshoot may decrease for slightly increasing VSR, then

increase again for larger VSR's again. The overshoot-vs-

VSR graphs presented in this data sheet thus reflect the

range of overshoot rather than one particular device's wavy

curve.

The typical 2N2222 and 2N2907 will deliver 750mA into a

short-circuit. This puts four watts of dissipation into the

2N2222 for VCH = 5V. The npn can dissipate this power for a

few tenths of a second as long as a metal-base TO-39

package is used. The small or non-metal-based packages

have short thermal time constants and high thermal

resistances, so they should withstand shorts for only a few

milliseconds. The Sense Out signal should be used to

control OE or reduce VCH and VCL to relieve the output

devices from overcurrent conditions.

Transistors such as the MJE200 and MJE210 have very

much improved collector resistances and high-current beta

compared to the 2N2222 and 2N2907. Their fT's are almost

as good and sustain at higher currents, and high-current

output accuracy will improve. They allow a K of 2V to reduce

dissipations further, but short-circuit currents will be as much

as two amperes! The geometries of these transistors are

larger, and the added transistor capacitances will slow the

maximum Slew Rates that the EL2021 can provide.

If transistors with ft's less than 200MHz are used, the

EL2021 will need to be overcompensated. This is

accomplished by connecting equal capacitors from the Drive

pins to ground. These capacitors will range from 10pF to

50pF. The overcompensation will slow the maximum slew

rate, but it will improve the overshoot and reactive load

driving capability, and can be considered a useful technique.

Figure 2 shows the equivalent output stage schematic when

the circuit is in high-impedance mode (OE = H). The external

transistors have their base-emitter junctions each reverse-

biased by a Schottky diode drop. A buffer amplifier copies

the output voltage to give a bootstrapped bias for the

Schottky stack. This scheme guarantees that the external

transistors will be off for any output level, and the output

leakage current is simply the bias current of the buffer.

The circuit works properly for AC signals up to 500V/µs.

Above this slew rate, the buffer cannot keep up and the

external transistors may turn on transiently. Because of the

bootstrap action, the output capacitance is less than 10pF up

to 10MHz of small-signal bandwidth and 300V/µs slew rate,

increasing beyond these values. Adding overcompensation

capacitors will degrade the slew rate that the output can

withstand before current is drawn.

It is sometime necessary to provide a “snubber” network-a

series R and C- to provide a local R.F. impedance for the

buffer to look into. 330Ω and 56pF should serve. Also, it is

well to provide some DC path to ground (47k for instance) to

bias the output stage when no actual circuit is connected to

the EL2021 in high-impedance mode.

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