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HFA3726IN 데이터 시트보기 (PDF) - Intersil

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HFA3726IN Datasheet PDF : 21 Pages
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HFA3726
Typical Application Diagram (Targeting IEEE 802.11 Standard)
TOYOCOM
TQS 432
VCC
0.1 75
(NOTE 21)
(NOTE 20)
100p 2
3
PE
74
77
76
100p
560
0.1
VCC
0.1
55
PE
54
57 100p
62
63
56 1K
VCC
0.1
0.1 VCC
RSSI
45
48
49
47
33 0.01 30
34
29
9
RXI_OUT
14
0.01
0.1
14
80
100p 61 64
60 100p
47p
79
100p
47p
100p
59
0.01
35 0.01 28
36
27
RXQ_OUT
15
0.01
20
TOYOCOM
TQS 432
VCO
LO_IN
(NOTE 22)
47p 220 44
56
VCC
46
0.1
47nH
316
TX_IF_OUT
42
100p (NOTE 23)
560MHz
VCO (AUXILIARY)
NC
50
43
0.01
18
900
19
(NOTE 24)
37 0.01 26
38
25
0.01
39 0.01 24
40
23
0.01
41
22
10
2V REF
0.1
12
TXI
0.1
11
TXQ
13
21
DUAL SYNTHESIZER
HFA3524IA
NOTES:
20. Input termination used to match a SAW filter.
21. Typical bandpass filter for 280MHz, BW = 47MHz, Q = 6. Can also be used if desired after the second stage.
22. Network shown for a typical -10dBm input at 50.
23. Output termination used to match a SAW filter.
24. RTUNE value for a 7.7 MHz cutoff frequency setting.
FIGURE 23. TYPICAL APPLICATION DIAGRAM (TARGETING IEEE 802.11 STANDARD)
Overall Device Description
The HFA3726 is a highly integrated baseband converter for half
duplex wireless data applications. It features all the necessary
blocks for baseband modulation and demodulation of “I” and
“Q” quadrature multiplexing signals. It targets applications using
all phase shift types of modulation (PSK) due to its hard limiting
receiving front end. Four fully independent blocks adds flexibility
for numerous applications covering a wide range of IF
frequencies. A differential design architecture, device pin out
and layout have been chosen to improve system RF properties
such as common mode signal immunity (noise, crosstalk),
reduce relevant parasitics, settling times and optimize dynamic
range for low power requirements. Single power supply
requirements from 2.7VDC to 5.5VDC makes the HFA3726 a
good choice for portable transceiver designs.
The HFA3726 has a two stage integrated limiting IF amplifier
with frequency response to 400MHz. These amplifiers
exhibit a -84dBm, -3dB cascaded limiting sensitivity with a
built in Receive Signal Strength Indicator (RSSI) covering
60dB of dynamic range with excellent linearity. An up
conversion and down conversion pair of quadrature doubly
balanced mixers are available for “I” and “Q” baseband IF
processing. These converters are driven by an internal
quadrature LO generator which has a broadband response
with excellent quadrature properties. To achieve broadband
operation, the Local Oscillator frequency input is required to
be twice the desired frequency for modulation/demodulation.
Duty cycle and signal purity requirements for the 2X LO input
using this type of quadrature architecture are less restrictive
14

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