HFA3726IN 데이터 시트보기 (PDF) - Intersil

부품명

상세내역

제조사

HFA3726IN

400MHz Quadrature IF Modulator/Demodulator

Intersil 

HFA3726

The “I” and “Q” filter matching is within 2o for phase and 0.5dB

for amplitude at the passband. Group delay characteristics

follow closely a theoretical 5th order Butterworth design.

When in the receive mode, the filters exhibit a 0dB of gain

with differential inputs and single ended outputs.

37 38 39 40

In the transmit mode, the digital ground referenced “I” and

“Q” input signals are level shifted, shaped and buffered with

constant driving differential outputs of 550mVP-P.

Coupling Capacitors

Capacitor coupling is used to tie all HFA3726 blocks together.

Special bias is used to maintain the DC levels on both ends of

coupling pins (capacitors) when the device is changes from

Transmitter to a Receiver and vice versa. The capacitance

values must be chosen as a compromise to maintain proper

frequency response and settling times (when the device is

brought up from sleep mode or power down).

1K 1K 1K 1K

50K

50K

43K

43K

FIGURE 25. CARRIER NULL BIASING

AC Electrical Specifications, IF Limiter, Single Stage Individual Performance Full Supply Range, TA = 25oC

PARAMETER

SYMBOL

(NOTE 25)

TEST LEVEL

MIN

TYP

MAX

UNITS

IF Frequency Range (Min Limited by Bypass Capacitors)

IFf

A

-

-

400

MHz

IF Voltage Gain

IFvG

A

IF Amp. Noise Figure at 250Ω Source Input

IFNF

B

Maximum IF Input, Single Ended

IFinmax

B

IF Differential Limiting Output (1st Harmonic at 500Ω Load)

IFVpp

A

IF Voltage Output Variation at -40dBm to -10dBm Input Range, IFVppI

A

500Ω Load

RSSI Slope, Current Output

IFRSSIsi

B

RSSI Slope, Voltage Output at 6K Load

IFRSSIv

A

39

45

-

dB

-

-

7

dB

-

-

500

mVP-P

160

200

260

mVP-P

-0.5

-

+0.5

dB

5.7

-

µA/dB

25

34

45

mV/dB

RSSI Output Voltage Compliance

IFRSSIvc

B

RSSI DC Offset and Noise Induced Voltage at 6K Load

IFRSSIof

A

-

-

VCC-0.7

V

200

400

600

mV

RSSI Absolute Accuracy, VIN = -40dBm

RSSI Rise and Fall Time at 50pF Load

(-20dBm to -40dBm Input)

IFRSSIa

A

IFRSSIt

B

-10

-

+10

%

-

-

1

µs

NOTE:

25. A = Production Tested, B = Based on Characterization, C = By Design

50MHz

100MHz

200MHz

300MHz

400MHz

FREQUENCY

TABLE 3. IF LIMITER S11, S22 PARAMETER

S11 (SINGLE ENDED)

0.96

-4.0o

0.95

-8.0o

0.91

-17.0o

0.84

-26.0o

0.80

-33.0o

S22 (DIFFERENTIAL)

0.45

0.0o

0.45

3.0o

0.47

7.0o

0.50

9.0o

0.53

10.0o

17

Share Link: