HFA3726IN 데이터 시트보기 (PDF) - Intersil
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HFA3726IN Datasheet PDF : 21 Pages
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HFA3726
for the HFA3726. Ground reference input signals as low as -
15dBm and frequencies up to 900MHz (2XLO) can be used
and tailored by the user. A buffered, divide by 2, LO single
ended 50Ω selectable output is provided for convenience of
PLL designs. The receive channel mixers “I” and “Q”
quadrature outputs have a frequency response up to 30MHz
for baseband signals and the transmit mixers are summed
and amplified to a single ended open collector output with
frequency response up to 400MHz.
Multiplexed or half duplex baseband 5th order Butterworth
low pass filters are also included in the design. The “I” and
“Q” filters address applications requiring low pass and
antialiasing filtering for external baseband threshold
comparison or simple analog to digital conversion in the
receive channel. During transmission, the filter is used for
pulse shaping and control of spectral mask.
These cut off frequency is selected for optimization of spectrum
output responses for 11Mchips/s for spread spectrum
applications (This rate can also be interpreted as symbol rates
for conventional data transmission). External processing
correlators in the receive channel as in the Intersil HSP3824
baseband converter, will bring the demodulation to lower
effective data rates. As an example, the use of 11M chips/sec,
11 chip Barker code using the 7.7MHz low pass filter in a QPSK
type of modulation scheme will bring a post processed effective
data rate to 1M symbol/sec or 2M bits/sec. In addition, these
filters are continuously tunable over a ±10% frequency range
via one external resistor. This feature gives the user the ability
to reshape the spectrum of a transmitted signal at the antenna
port which takes into account any spectral regrowth along the
transmitter chain. The modulator “I” and “Q” filter inputs accept
digital signal level data for modulation and their phase and gain
characteristics, including I/Q matching and group delay are well
suitable for reliable data transmission. In the Receive mode and
over the full input limiting dynamic range, both low pass filters
outputs swing a 500mVP-P baseband signal.
Each block has its own independent power enable control for
power management and half duplex transmit/receive
operation. A stable 2VDC output and a buffered band gap
reference voltage are also provided for an external analog to
digital conversion reference.
Detailed Description (Refer to Block Diagram)
IF Limiter
Two independent limiting amplifiers are available in the
HFA3726. Each one has a broadband response to 400MHz
with 45dB of gain. The low frequency response is limited by
external components because the device has no internal
coupling capacitors. The differential limiting output swing
with a 500Ω load is typically 200mVP-P at the fundamental
frequency and is temperature stable.
Both amplifiers are very stable within their passband and the
cascaded performance also exhibits very good stability for
any input source impedance. Wide bandwidth SAW filters for
spread spectrum applications or any desired source
impedance filter implementation can be used for IF filtering
before the cascaded amplifiers. The stability is remarkable
for such an integrated solution. In fact, in many applications
it is possible to remove the bypass pin capacitors with no
degradation in stability. The cascaded -1dB and -3dB input
limiting sensitivity have been characterized as -79dBm and
84dBm respectively, for a 50Ω single ended input at 280MHz
and with a 47MHz bandwidth interstage bandpass LC filter
(refer to Figure 22, Test Diagram). The input sensitivity is
determined to a large extent by the bandwidth of the
interstage filter and input source impedance.
The noise figure for each stage has been characterized at
6dB for a 250Ω single end input impedance and 9dB for a
50Ω input impedance. These low noise figures combined
with their high gain, eliminate the need for additional IF gain
components. The use of interstage bandpass filtering is
suggested to decrease the noise bandwidth of the signal
driving the second stage. Excessive broadband noise
energy amplified by the first stage will force the last limiting
stage to lose some of its effective gain or “limit on the noise”.
The use of interstage filters with narrower bandwidths will
further improve the sensitivity of the cascaded limiter chain.
The amplifier differential output impedance is 140Ω (70Ω
single ended) which gives the user, the ability to design
simple wide or narrow LC bandwidth interstage filters, or
tailor a desired cascaded gain by using differential
attenuators. The filter can be designed with a desired “Q” by
using the followIng relationship: Q = Rp/X; where Rp is the
parallel combination of 140Ω source resistance and the load
(approximately 500Ω when using 560Ω termination as in
Figure 22, Test Diagram), and X is the reactance of either L
or C at the desired center frequency.
Another independent feature of the limiting amplifier is its
Receive Signal Strength Indicator (RSSI). A Log-Amp design
was developed which resulted in a current output proportional
to the input power. The RSSI output voltage is set by summing
the two stages output currents, which are full wave rectified
signals, to a common resistor to ground. This full wave rectified
voltage can then be converted to DC by the use of a filter
capacitor in parallel with the resistor (The larger the capacitor
value, the less the AC ripple with the expense of longer RSSI
settling times). This arrangement gives the user the flexibility to
set the dynamic voltage swing to any desired level by an
appropriate resistance choice. Each stage has an available on
chip 6kΩ low temperature coefficient resistor to ground for
current output termination that can be used for convenience.
The RSSI gives a ±3dBm accurate indication of the receive
input power. This accuracy is across a 60dB input dynamic
range. The cascaded HFA3726 RSSI slope is of 5.0µa/dB.
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