MSM9005-XX 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM9005-XX

DOT MATRIX LCD CONTROLLER WITH 8-DOT COMMON DRIVER AND 65-DOT SEGMENT DRIVER

Oki Electric Industry 

¡ Semiconductor

FEDL9005-03

MSM9005-xx

How to Write Command and Display Data

• Input a command and display data into the SI pin sequentially from MSB in 8-bit units (MSB

first).

• Setting CS pin at "H" level enables transfer of a command and display data.

• Setting CS pin at a "L" level disables data transfer.

• As shown in the figure below, data is shifted at the rising edge of the shift clock that is input

to the SHT pin. When 8 shift clocks are input, internal load signals are automatically generated

and a command or display data is loaded. It is unnecessary to provide load signals externally.

• Loaded 8-bit data is recognized as a command if the C/D pin is set at "H" level, and is

recognized as display data if the C/D pin is set at "L" level on the rising edge of the 8th shift

clock input to the SHT pin.

Write timing is shown below.

(Example) Writing CG ROM address data The wait time of 21 × 1/fOSC is required

CS

C/D

SHT

Address

pointer

SI

21 x 1/fOSC WAIT

21 x 1/fOSC WAIT

tCH

Don't Care

Don't Care

Don't Care

00h

01h

02h

11*000 00

MSB

LSB

LPA command

(Sets address pointer

to 00h)

C7 C6 C5 C4 C3 C2 C1 C0

MSB

LSB

CG ROM code data

C7 C6 C5 C4 C3 C2 C1 C0

MSB

LSB

CG ROM code data at

the next address

13/30

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