MT46H16M16 데이터 시트보기 (PDF) - Micron Technology

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MT46H16M16

Mobile DDR SDRAM

Micron Technology 

Figure 3: Functional Block Diagram (8 Meg x 32)

256Mb: x16, x32 Mobile DDR SDRAM

General Description

CKE

CK#

CK

CS#

WE#

CAS#

RAS#

Control

logic

Standard mode

register

Extended mode

register

12

12

A0–A11,

BA0, BA1

14 Address

register

Refresh

counter

13

Bank 3

Bank 2

Bank 1

Row-

12

address

MUX

Bank 0

Row-

address

Latch

and

decoder

8,192

Bank 0

Memory

array

(4,096 x 256 x 64)

Sense amplifiers

4,092

2

Bank

control

logic

2

Column-

address

8

9

Counter/

latch

1

I/O gating

DM mask logic

256

(x64)

Column

decoder

32

64

READ

MUX

latch 32

DATA

32

DQS

generator

DRVRS

4

COL 0

DQS

CK Input

64

registers

4

MASK

WRITE

64

FIFO

and

drivers

4

8

32

64

4

4

4

32

32

RCVRS

CK

CK

32

32

out

in DATA

CK

4

COL 0

DQ0–

DQ31

DQS0

DQS1

DQS2

DQS3

DQM0

DQM1

DQM2

DQM3

Notes: 1. JEDEC-standard x32 DQ configuration shown.

PDF: 09005aef82091978 / Source: 09005aef8209195b

MT46H16M16LF__2.fm - Rev. H 6/08 EN

8

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2005 Micron Technology, Inc. All rights reserved.

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