MT9162AN1 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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MT9162AN1 Datasheet PDF : 22 Pages
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MT9162
Data Sheet
Electrical Characteristics† for Analog Inputs
Characteristics
Sym.
1 Maximum input voltage without
overloading Codec
across AIN+/AIN-
VIOLH
Min.
Typ.‡
2.90
3.00
Max. Units
Test Conditions
Vp-p A/µ = 0
A/µ = 1
2 Input Impedance
ZI
50
kΩ AIN+/AIN- to VSS
† Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
‡ Typical figures are at 25 °C and are for design aid only: not guaranteed and not subject to production testing.
AC Electrical Characteristics† - SSI BUS Synchronous Timing (see Figure 5)
Characteristics
Sym. Min. Typ.‡ Max. Units
Test Conditions
1 BCL Clock Period
2 BCL Pulse Width High
3 BCL Pulse Width Low
4 BCL Rise/Fall Time
5 Strobe Pulse Width
6 Strobe setup time before BCL falling
7 Strobe hold time after BCL falling
8 Dout High Impedance to Active Low
from Strobe rising
9 Dout High Impedance to Active High
from Strobe rising
10 Dout Active Low to High Impedance
from Strobe falling
11 Dout Active High to High Impedance
from Strobe falling
12 Dout Delay (high and low) from BCL
rising
13 Din Setup time before BCL falling
14 Din Hold Time from BCL falling
tBCL 244
1953 ns BCL=4096 kHz to 512 kHz
tBCLH
122
ns BCL=4096 kHz
tBCLL
122
ns BCL=4096 kHz
tR/tF
20
ns Note 1
tENW
8 x tBCL
ns Note 1
tSSS
70
tBCL-80 ns
tSSH
80
tBCL-80 ns
tDOZL
50
ns CL=150 pF, RL=1K
tDOZH
50
ns CL=150 pF, RL=1K
tDOLZ
50
ns CL=150 pF, RL=1K
tDOHZ
50
ns CL=150 pF, RL=1K
tDD
50
ns CL=150 pF, RL=1K
tDIS
20
ns
tDIH
50
ns
† Timing is over recommended temperature range & recommended power supply voltages.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
NOTE 1:Not production tested, guaranteed by design.
11
Zarlink Semiconductor Inc.
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