PCA9502 데이터 시트보기 (PDF) - NXP Semiconductors.

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PCA9502

8-bit I/O expander with I2C-bus/SPI interface

NXP Semiconductors. 

NXP Semiconductors

PCA9502

8-bit I/O expander with I2C-bus/SPI interface

Table 2.

Symbol

IRQ

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

VSS

VSS

Pin description …continued

Pin

Type Description

12

O Interrupt (open-drain, active LOW). Interrupt is enabled when

interrupt sources are enabled in the I/O Interrupt Enable register

(IOIntEna). The interrupt condition is the change of state of the

input pins. An external resistor (1 kΩ for 3.3 V, 1.5 kΩ for 2.5 V)

must be connected between this pin and VDD.

13

I/O programmable I/O pin

14

I/O programmable I/O pin

15

I/O programmable I/O pin

16

I/O programmable I/O pin

18

I/O programmable I/O pin

19

I/O programmable I/O pin

20

I/O programmable I/O pin

21

I/O programmable I/O pin

10, 17, -

23

ground

center -

pad

The center pad on the back side of the HVQFN24 package is

metallic and should be connected to ground on the printed-circuit

board.

[1] See Section 7.1 “Hardware reset, Power-On Reset (POR) and software reset”

7. Functional description

The device interfaces to a host through either I2C-bus or SPI interface (selectable through

I2C/SPI pin), and provides the host with eight programmable GPIO pins.

7.1 Hardware reset, Power-On Reset (POR) and software reset

These three reset methods are identical and will reset the internal registers as indicated in

Table 3.

Table 3 summarizes the state of registers after reset.

Table 3. Registers after reset

Register

Reset state

I/O direction

all bits cleared

I/O interrupt enable

all bits cleared

I/O control

all bits cleared

Table 4 summarizes the state of hardware pins after reset.

Table 4.

Signal

I/Os

IRQ

Signals after reset

Reset state

inputs

HIGH by external pull-up

PCA9502_3

Product data sheet

Rev. 03 — 13 October 2006

© NXP B.V. 2006. All rights reserved.

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