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RV4141A 데이터 시트보기 (PDF) - Fairchild Semiconductor

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RV4141A Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Circuit Operation
(Refer to Figure 1 and Figure 3.)
The precision op amp connected to pins 1 through 3
senses the fault current flowing in the secondary of the
sense transformer, converting it to a voltage at pin 1.
The ratio of secondary current to output voltage is
directly proportional to feedback resistor, RSET.
RSET converts the sense transformer secondary current
to a voltage at pin 1. Due to the virtual ground created at
the sense amplifier input by its negative feedback loop,
the sense transformer's burden is equal to the value of
RIN. From the transformer's point of view, the ideal value
for RIN is 0. This causes it to operate as a true current
transformer with minimal error. However, making RIN
equal to zero creates a large offset voltage at pin 1 due
to the sense amplifier's very high DC gain. RIN should be
selected as high as possible, consistent with preserving
the transformer's operation as a true current mode
transformer. A typical value for RIN is between 200 and
1000.
As seen in Equation (1), maximizing RIN minimizes the
DC offset error at the sense amplifier output. The DC
offset voltage at pin 1 contributes directly to the trip
current error. The offset voltage at pin 1 is:
VOS RSET /(RIN RSEC )
(1)
where:
VOS = Input offset voltage of sense amplifier;
RSET = Feedback resistor;
RIN = Input resistor;
RSEC = Transformer secondary winding resistance.
The sense amplifier has a specified maximum offset
voltage of 200μV to minimize trip current errors. Two
comparators connected to the sense amplifier output are
configured as a window detector, whose references are
-6.5V and +6.5V, referred to pin 3. When the sense
transformer secondary RMS current exceeds 4.6/RSET,
the output of the window detector starts the delay circuit.
If the secondary current exceeds the predetermined trip
current for longer than the delay time, a current pulse
appears at pin 7, triggering the SCR.
The SCR anode is directly connected to a solenoid or
relay coil. The SCR can be tripped only when its anode
is more positive than its cathode.
Supply Current Requirements
The RV4141A is powered directly from the line through
a series-limiting resistor called RLINE; its value is
between 24kand 91k
The controller IC has a built-in dioderectifier, eliminating
the need for external power diodes.The recommended
value for RLINEis 24kto 47kfor110V systems and
47kto 91kfor 220V systems. WhenRLINEis
47kthe shunt regulator current is limited to3.6mA.
The recommended maximum peak line currentthrough
RLINE is 10mA.
GFCI Application
(Refer to Figure 3)
The GFCI detects a ground fault by sensing a difference
in current in the line and neutral wires. The difference in
current is assumed to be a fault current creating a
potentially hazardous path from line to ground. Since the
line and neutral wires pass through the center of the
sense transformer, only the differential primary current is
transferred to the secondary. Assuming the turns ratio is
1:1000, the secondary current is 1/1000th the fault
current. The RV4141A’s sense amplifier converts the
secondary current to a voltage compared with either of
the two window detector reference voltages. If the fault
current exceeds the design value for the duration of the
programmed time delay, the RV4141A sends a current
pulse to the gate of the SCR.
Detecting ground-to-neutral faults is more difficult. RB
represents a normal ground fault resistance. RN is the
wire resistance of the electrical circuit between load/
neutral and earth ground. RG represents the ground-to-
neutral fault condition. According to UL 943, the GFCI
must trip when RN = 0.4, RG = 1.6, and the normal
ground fault is 6mA.
Assuming the ground fault to be 5mA, 1mA, and 4mA
goes through RG and RN, respectively, causing an
effective 1mA fault current. This current is detected by
the sense transformer and amplified by the sense
amplifier. The ground / neutral and sense transformers
are mutually coupled by RG, RN, and the neutral wire
ground loop, producing a positive feedback loop around
the sense amplifier. The newly created feedback loop
causes the sense amplifier to oscillate at a frequency
determined by ground/neutral transformer secondary
inductance and C4, which occurs at 8KHz.
C2 is used to program the time required for the fault to
be present before the SCR is triggered. Refer to
Equation (2) for calculating the value of C2. Its typical
value is 12nF for a 2ms delay. RSET is used to set the
fault current at which the GFCI trips. When used with a
1:1000 sense transformer, its typical value is 1Mfor a
GFCI designed to trip at 5mA.
RIN should be the highest value possible that ensures a
predictable secondary current from the sense
transformer. If RIN is set too high, normal production
variations in the transformer permeability causes unit-to-
unit variations in the secondary current. If it is too low, a
large offset voltage error at pin 1 is present. This error
voltage in turn creates a trip current error proportional to
the input offset voltage of the sense amplifier. As an
example, if RIN is 500, RSET is 1M, RSEC is 45 and
the VOS of the sense amplifier is its maximum of 200μV;
the trip current error is ±5.6%.
© 2003 Fairchild Semiconductor Corporation
RV4141A • Rev. 1.0.8
5
www.fairchildsemi.com

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