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RV4141A 데이터 시트보기 (PDF) - Fairchild Semiconductor

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RV4141A Datasheet PDF : 9 Pages
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The SCR anode is directly connected to a solenoid or
relay coil. It can be tripped only when its anode is more
positive than its cathode. It must have a high dV/dt
rating to ensure that line noise (generated by electrically
noisy appliances) does not falsely trigger it. Also the
SCR must have a gate drive requirement less than
200μA. C3 is a noise filter that prevents high-frequency
line pulses from triggering the SCR. The relay solenoid
should have a response time of 3ms or less to meet the
UL 943 timing requirement.
Sense Transformers and Cores
The sense and ground/neutral transformer cores are
usually fabricated using high-permeability laminated
steel rings. Their single-turn primary is created by
passing the line and neutral wires through the center of
its core. The secondary is usually from 200 to 1500
turns. Transformers may be obtained from Magnetic
Metals, Inc. (www.magmet.com).
Calculating the Values of RSET and C2
Determine the nominal ground-fault trip-current
requirement. This is typically 5mA in North America
(117VAC) and 22mA in the UK and Europe (220VAC).
Determine the minimum delay time required to prevent
nuisance tripping, typically 1 to 2ms. The value of C2
required to provide the desired delay time is:
C2 6t
(2)
where:
C2 is in Nf and t is the desired delay time in ms.
The value of RSET to meet the nominal ground fault trip
current specification is:
RSET
IFAULT
4.6 N
COS 180(t/P)
(3)
where:
RSET is in k
t is the time delay in ms;
P is the period of the line frequency in ms;
IFAULT is the desired ground fault trip current in mA RMS;
N is the number of sense transformer secondary turns.
Note:
2. This formula assumes an ideal sense transformer is
used. The calculated value of RSET may have to be
changed up to 30% when using a non-ideal
transformer.
Figure 3. GFI Application Circuit
© 2003 Fairchild Semiconductor Corporation
RV4141A • Rev. 1.0.8
6
www.fairchildsemi.com

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