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SAA7706H 데이터 시트보기 (PDF) - Philips Electronics

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SAA7706H
Philips
Philips Electronics Philips
SAA7706H Datasheet PDF : 52 Pages
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Philips Semiconductors
Car radio Digital Signal Processor (DSP)
Product specification
SAA7706H
7 PINNING
SYMBOL
VDACP
VDACN1
LEVEL
NAV_GND
POM
RRV
AUX_L
AUX_R
RLV
VSSA2
VDDA2
VREFDA
FRV
CD_R_GND
DSP2_INOUT2
FLV
DSP2_INOUT1
DSP2_INOUT3
DSP2_INOUT4
LOOPO
TP1
VDDD3V7
VSSD3V7
SPDIF2
SPDIF1
SYSFS
CD_WS
CD_DATA
CD_CLK
IIS_CLK
IIS_IN1
IIS_IN2
IIS_WS
IIS_OUT1
IIS_OUT2
PIN PIN TYPE
DESCRIPTION
1 apio
positive reference voltage ADC1, ADC2, ADC3 and level-ADC
2 apio
ground reference voltage ADC1
3 apio gsmcap LEVEL input pin; via this pin the level of the FM signal or level of the
AM signal is fed to the DSP1; the level information is used in the DSP1 for
dynamic signal processing
4 apio gsmcap common mode reference input pin of the navigation signal (pin AM_L/NAV)
5 apio
power-on mute of the QFSDAC; timing is determined by an external
capacitor
6 apio
rear; right audio output of the QFSDAC
7 apio
left channel of analog AUX input
8 apio
right channel of analog AUX input
9 apio
rear; left audio output of the QFSDAC
10 vssco
ground supply analog part of the QFSDAC and SPDIF bitslicer
11 vddco
positive supply analog part of the QFSDAC and SPDIF bitslicer
12 apio
voltage reference of the analog part of QFSDAC
13 apio
front; right audio output of the QFSDAC
14 apio
15 bpts5thdt5v
common-mode reference input pin for analog CD_R or TAPE_R in the
event of separated ground reference pins for left and right are used
flag input/output 2 of the DSP2-core (DSP2-flag) I2C-bus configurable
16 apio
17 bpts5thdt5v
18 bpts5thdt5v
19 bpts5thdt5v
front; left audio voltage output of the QFSDAC
flag input/output 1 of the DSP2-core (DSP2-flag) I2C-bus configurable
flag input/output 3 of the DSP2-core (DSP2-flag) I2C-bus configurable
flag input/output 4 of the DSP2-core (DSP2-flag) I2C-bus configurable
20 bpts5tht5v
21 ipthdt5v
SYSCLK output (256fs)
for test purpose only; this pin may be left open or connected to ground
22 vdde
positive supply (peripheral cells only)
23 vsse
24 apio
25 apio
ground supply (peripheral cells only)
SPDIF input 2; can be selected instead of SPDIF1 via I2C-bus bit
SPDIF input 1; can be selected instead of SPDIF2 via I2C-bus bit
26 ipthdt5v
27 ipthdt5v
system fs clock input
digital CD-source word select input; I2S-bus or LSB-justified format
28 bpts10thdt5v digital CD-source left-right data input; I2S-bus or LSB-justified format
29 ipthdt5v
digital CD-source clock input I2S-bus or LSB-justified format
30 ots10ct5v
clock output for external I2S-bus receiver; for example headphone or
subwoofer
31 ipthdt5v
data 1 input for external I2S-bus transmitter; e.g. audio co-processor
32 ipthdt5v
data 2 input for external I2S-bus transmitter; e.g. audio co-processor
33 ots10ct5v
word select output for external I2S-bus receiver; for example headphone or
subwoofer
34 ots10ct5v
data 1 output for external I2S-bus receiver or co-processor
35 ots10ct5v
data 2 output for external I2S-bus receiver or co-processor
2001 Mar 05
7

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