T83C5101 데이터 시트보기 (PDF) - Atmel Corporation

부품명

상세내역

제조사

T83C5101

8-bit Low Pin Count Microcontrollers

Atmel Corporation 

T8xC5101/02

Dual Data Pointer

Register (DPTR)

Figure 3. Use of Dual Pointer

The additional data pointer can be used to speed up code execution and reduce code

size in a number of ways.

The dual DPTR structure is a way by which the chip will specify the address of an exter-

nal data memory location. There are two 16-bit DPTR registers that address the external

memory, and a single bit called DPS = AUXR1/bit0 (See Table 3.) that allows the pro-

gram code to switch between them (Refer to Figure 3).

External Data Memory

(On chip XRAM)

7

0

DPS

AUXR1(A2H)

DPTR1

DPTR0

DPH(83H) DPL(82H)

Table 3. AUXR1: Auxiliary Register 1

AUXR1

Address 0A2H

-

-

-

-

GF3

0

-

DPS

Reset value

X

X

X

X

0

0

X

0

Symbol Function

-

Not implemented, reserved for future use.

DPS

Data Pointer Selection.

DPS

Operating Mode(1)

0

DPTR0 Selected

1

DPTR1 Selected

GF3

This bit is a general purpose user flag(2)

Notes:

1. User software should not write 1s to reserved bits. These bits may be used in future

8051 family products to invoke new feature. In that case, the reset value of the new

bit will be 0, and its active value will be 1. The value read from a reserved bit is

indeterminate.

2. GF3 will not be available on first version of the RC devices.

10

4233H–8051–02/08

Share Link: