CXD1186CR 데이터 시트보기 (PDF) - Sony Semiconductor
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CXD1186CR Datasheet PDF : 46 Pages
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CXD1186CQ/CR
Sony-made CIRC LSI
CDL30 series
CDL35 series
CDL40 series
(48 bit slot mode)
CDL40 series
(64 bit slot mode)
Table 2.1.1 DRVIF Register setting value
DRV IF Register
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
L
∗
L
L
L
H
L
L
L
∗
L
H
L
H
L
L
L
∗
H
L
H
X
H
L
Timing chart
Fig. 2.1.1 (2)
Fig. 2.1.1 (3)
Fig. 2.1.1 (4)
(Note 1) ∗ at normal speed PB set to “L”, at double speed PB set to “H”.
(Note 2)
CDL30 series
CDL35 series
CDL40 series
CXD1125Q/QZ, CXD1130Q/QZ, CXD1135Q/QZ,
CXD1241Q/QZ, CXD1245Q, CXD1246Q/QZ,
CXD1247Q/QZ/R and others.
CXD1165Q, CXD1167Q/QZ/R and others.
CXD2500Q/QZ and others.
2.1.2 Decoder Control (DECCTL) register
bits0 to 2 : DECMDSL2, 1, 0
(Decoder Mode Select 2, 1, 0)
DECMDSL2
1
0
“L”
“L”
“X”
Decoder disable
“L”
“H”
“X”
Monitor only mode
“H”
“L”
“L”
Write only mode
“H”
“L”
“H”
Real time correction mode
“H”
“H”
“L”
Repeat correction mode
“H”
“H”
“H”
CD-DA mode
bit3 : AUTODIST (Auto Distinction)
“H” ; Error Correction performed according to the Mode byte and FORM bit read from Drive.
“L” ; Error Correction is performed according to the following MODESEL and FORMSEL bits.
bit4 : FORMSEL (Form Select)
bit5 : MODESEL (Mode Select)
When AUTODIST is at “L” the sector is corrected as the following MODE or FORM.
MODESEL FORMSEL
“L”
“L”
MODE1
“H”
“L”
MODE2, FORM1
“H”
“H”
MODE2, FORM2
bit6 : ECCSTR (ECC Strategy)
“H” ; Error Correction is performed with consideration to respective data error flag.
“L” ; Error Correction is performed without consideration to respective data error flag. When an 8
bit/Word RAM is connected, turn this bit to “L”.
bit7 : ENDLADR (Enable DLADR)
“H” ; When this bit is set to “H”, DLADR is enabled.
When, either write only mode, real time correction, or CD-DA mode is being executed, the decoder
stops the buffer write as DADRC and DLADR turn equal.
“L” ; When this bit is set to “L”, DLADR is disabled.
During the execution of write only mode or real time correction, even if DADRC and DLADR turn
equal, the decoder does not stop buffer write.
(See paragraph 4 for details)
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