CDP68HC68T1(1997) 데이터 시트보기 (PDF) - Intersil

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CDP68HC68T1
(Rev.:1997)

CMOS Serial Real-Time Clock With RAM and Power Sense/Control

Intersil 

System Diagrams (Continued)

CDP68HC68T1

AC

LINE

0.047

REGULATOR

R

CHARGE

NC

0.1

100k

POR VDD VSYS

VBATT

1k

20k

RTC

VDD

XTAL

PSE

CPUR

LINE

INT

CLK

OUT

CE

VSS

SPI

VDD

3

(EPS)

ENABLED

POWER

SUPPLY

VDD

RESET

CDP68HC05C4B

IRQ

OSC1

PORT

SPI

VSS

FIGURE 18. EXAMPLE OF A SYSTEM WITH A BATTERY BACKUP

19

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