XRT91L30 데이터 시트보기 (PDF) - Exar Corporation

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XRT91L30

STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER

Exar Corporation 

XRT91L30

STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER

xr

REV. 1.0.1

TRANSMITTER SECTION

NAME

LEVEL

TYPE

PIN

DESCRIPTION

REFCLKP

LVPECL Diff

I

REFCLKN

16 Reference Clock Input (77.76 MHz or 19.44 MHz)

17 This differential clock input reference is used for the transmit

clock multiplier unit (CMU) and clock data recovery (CDR) to

provide the necessary high speed clock reference for this

device. It will accept either a 77.76 MHz or a 19.44 MHz Differ-

ential LVPECL clock source. Pin CMUFREQSEL determines

the value used as the reference. See Pin CMUFREQSEL for

more details. REFCLKP/N inputs are internally biased to 1.65V.

NOTE: In the event that TTLREFCLK LVTTL input is used

instead of these differential inputs for clock reference,

the REFCLKP should be tied to ground.

TTLREFCLK

LVTTL,

I

LVCMOS

36 TTL Reference Clock Input (77.76 MHz or 19.44 MHz)

This optional LVTTL clock input reference is used for the trans-

mit clock multiplier unit (CMU) and clock data recovery (CDR)

to provide the necessary high speed clock reference for this

device rather than a differential clock source. It will accept

either a 77.76 MHz or a 19.44 MHz LVTTL clock source. Pin

CMUFREQSEL determines the value used as the reference.

See Pin CMUFREQSEL for more details.

NOTE: In the event that REFCLKP/N differential inputs are

used instead of this LVTTL input for clock reference,

the TTLREFCLK should be tied to ground.

8

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