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UDA1345TS 데이터 시트보기 (PDF) - NXP Semiconductors.

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UDA1345TS
NXP
NXP Semiconductors. NXP
UDA1345TS Datasheet PDF : 29 Pages
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NXP Semiconductors
Economy audio CODEC
Product specification
UDA1345TS
7.11.2 SYSTEM CLOCK
Under static pin control the options are 256fs and 384fs.
With pin MP3 (pin 14) the mode can be set as is given in
Table 8.
Table 8 System clock settings under static pin mode
MODE
256fs system clock
384fs system clock
MP3
LOW
HIGH
7.11.3 MUTE AND DE-EMPHASIS
Under static pin control via MP2 de-emphasis and mute
can be selected for the playback path. The definition of the
MP2 pin is given in Table 9.
7.11.5 ADC INPUT VOLTAGE CONTROL
The UDA1345TS supports a 2 V (RMS) input using a
series resistor as described in Section 7.2.
In static pin mode the 3-level pin MP4 (pin 15) is used to
select 0 or 6 dB gain mode. When MP4 is set LOW the
ADC is powered-down. When MP4 is set to half the power
supply voltage, then 6 dB gain is selected, and when MP4
is set HIGH then 0 dB gain is selected.
Table 11 MP4 mode settings (static mode)
MODE
ADC Power-down mode
6 dB gain mode
0 dB gain mode
MP4
LOW
MID
HIGH
Table 9 Settings for pin MP2
MODE
No de-emphasis and mute
De-emphasis 44.1 kHz
Muted
MP2
LOW
0.5VDDD
HIGH
7.11.4 MULTIPLE FORMAT INPUT/OUTPUT INTERFACE
The data input/output formats supported under static pin
control are as follows:
I2S-bus with data word length of up to 24 bits
MSB-justified serial format with data word length of up to
24 bits
Two combined data formats with MSB data output and
LSB 16 and 20 bits data input.
The data formats can be selected using pins MP1 (pin 9)
and MP5 (pin 20) as given in Table 10.
Table 10 Data format settings under static pin control
INPUT FORMAT
MSB-justified
I2S-bus
MSB output LSB 20 input
MSB output LSB 16 input
MP1
LOW
LOW
HIGH
HIGH
MP5
LOW
HIGH
LOW
HIGH
The formats are illustrated in Fig.3. Left and right data
channel words are time multiplexed.
2002 May 28
11

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