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UPD78F0512AGA-GAM-AX 데이터 시트보기 (PDF) - Renesas Electronics

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UPD78F0512AGA-GAM-AX
Renesas
Renesas Electronics Renesas
UPD78F0512AGA-GAM-AX Datasheet PDF : 982 Pages
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CHAPTER 5 PORT FUNCTIONS ......................................................................................................... 159
5.1 Port Functions ............................................................................................................................ 159
5.2 Port Configuration...................................................................................................................... 163
5.2.1 Port 0............................................................................................................................................. 164
5.2.2 Port 1............................................................................................................................................. 175
5.2.3 Port 2............................................................................................................................................. 181
5.2.4 Port 3............................................................................................................................................. 183
5.2.5 Port 4............................................................................................................................................. 186
5.2.6 Port 5............................................................................................................................................. 188
5.2.7 Port 6............................................................................................................................................. 189
5.2.8 Port 7............................................................................................................................................. 194
5.2.9 Port 12........................................................................................................................................... 196
5.2.10 Port 13......................................................................................................................................... 199
5.2.11 Port 14......................................................................................................................................... 200
5.3 Registers Controlling Port Function ........................................................................................ 204
5.4 Port Function Operations .......................................................................................................... 221
5.4.1 Writing to I/O port .......................................................................................................................... 221
5.4.2 Reading from I/O port.................................................................................................................... 221
5.4.3 Operations on I/O port................................................................................................................... 221
5.5 Settings of Port Mode Register and Output Latch When Using Alternate Function........... 221
5.6 Cautions on 1-Bit Manipulation Instruction for Port Register n (Pn).................................... 224
CHAPTER 6 CLOCK GENERATOR .................................................................................................... 225
6.1 Functions of Clock Generator................................................................................................... 225
6.2 Configuration of Clock Generator ............................................................................................ 226
6.3 Registers Controlling Clock Generator.................................................................................... 229
6.4 System Clock Oscillator ............................................................................................................ 240
6.4.1 X1 oscillator................................................................................................................................... 240
6.4.2 XT1 oscillator ................................................................................................................................ 240
6.4.3 When subsystem clock is not used ............................................................................................... 243
6.4.4 Internal high-speed oscillator ........................................................................................................ 243
6.4.5 Internal low-speed oscillator.......................................................................................................... 243
6.4.6 Prescaler ....................................................................................................................................... 243
6.5 Clock Generator Operation ....................................................................................................... 244
6.6 Controlling Clock........................................................................................................................ 248
6.6.1 Example of controlling high-speed system clock ........................................................................... 248
6.6.2 Example of controlling internal high-speed oscillation clock.......................................................... 251
6.6.3 Example of controlling subsystem clock........................................................................................ 254
6.6.4 Example of controlling internal low-speed oscillation clock ........................................................... 256
6.6.5 Clocks supplied to CPU and peripheral hardware ......................................................................... 257
6.6.6 CPU clock status transition diagram.............................................................................................. 258
6.6.7 Condition before changing CPU clock and processing after changing CPU clock ........................ 265
6.6.8 Time required for switchover of CPU clock and main system clock .............................................. 266
6.6.9 Conditions before clock oscillation is stopped ............................................................................... 268
6.6.10 Peripheral hardware and source clocks ...................................................................................... 269
R01UH0008EJ0401 Rev.4.01
11
Jul 15, 2010

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