MFRC522_(2007) 데이터 시트보기 (PDF) - NXP Semiconductors.

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MFRC522_
(Rev.:2007)

Contactless Reader IC

NXP Semiconductors. 

NXP Semiconductors

MFRC522

Contactless Reader IC

Table 16: Description of CommIRqReg bits …continued

All bits in the register CommIRqReg shall be cleared by software.

Bit Symbol Description

2 LoAlertIRq Set to logic 1, when bit LoAlert in register Status1Reg is set. In opposition to

LoAlert, LoAlertIRq stores this event and can only be reset as indicated by bit

Set1.

1 ErrIRq

Set to logic 1 if any error bit in the ErrorReg Register is set.

0 TimerIRq Set to logic 1 when the timer decrements the TimerValue Register to zero.

9.2.1.6 DivIRqReg

Contains Interrupt Request bits

Table 17: DivIRqReg register (address 05h); reset value: X0h

Bit

7

6

5

4

3

2

Symbol Set2

-

MfinActIRq

-

CRCIRq

Access w

Rights

RFU

dy

RFU

dy

1

0

-

RFU

Table 18: Description of DivIRqReg bits

All bits in the register DivIRqReg shall be cleared by software.

Bit

Symbol

Description

7

Set2

Set to logic 1, Set2 defines that the marked bits in the register

DivIRqReg are set.

Set to logic 0, Set2 defines, that the marked bits in the register

DivIRqReg are cleared

6 to 5 -

Reserved for future use.

4

MfinActIRq Set to logic 1, when MFIN is active. This interrupt is set when either a

rising or falling signal edge is detected.

3

-

Reserved for future use.

2

CRCIRq

Set to logic 1, when the CRC command is active and all data are

processed.

1 to 0 -

Reserved for future use.

112132

Product data sheet

Rev. 3.2 — 22 May 2007

© NXP B.V. 2007. All rights reserved.

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