MFRC522_(2007) 데이터 시트보기 (PDF) - NXP Semiconductors.
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MFRC522_ Datasheet PDF : 109 Pages
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NXP Semiconductors
MFRC522
Contactless Reader IC
9.2.1.7 ErrorReg
Error bit register showing the error status of the last command executed.
Table 19:
Bit
Symbol
Access
Rights
ErrorReg register (address 06h); reset value: 00h
7
6
5
4
3
2
WrErr TempErr - BufferOvfl CollErr CRCErr
r
r
RFU
r
r
r
1
ParityErr
r
0
ProtocolErr
r
Table 20: Description of ErrorReg bits
Bit
Symbol
Description
7
WrErr
Set to logic 1, when data is written into the FIFO by the host during the
MFAuthent command or if data is written into the FIFO by the host
during the time between sending the last bit on the RF interface and
receiving the last bit on the RF interface.
6
TempErr[1]
Set to logic 1, if the internal temperature sensor detects overheating.
In this case, the antenna drivers are switched off automatically.
5
-
Reserved for future use.
4
BufferOvfl
Set to logic 1, if the host or a MFRC522’s internal state machine (e.g.
receiver) tries to write data into the FIFO buffer although the FIFO
buffer is already full.
3
CollErr
Set to logic 1, if a bit-collision is detected. It is cleared automatically at
receiver start-up phase. This bit is only valid during the bitwise
anticollision at 106 kbit/s. During communication schemes at 212,
424 and 848 kbit/s this bit is always set to logic 0.
2
CRCErr
Set to logic 1, if bit RxCRCEn in register RxModeReg is set and the
CRC calculation fails. It is cleared to logic 0 automatically at receiver
start-up phase.
1
ParityErr
Set to logic 1, if the parity check has failed. It is cleared automatically
at receiver start-up phase. Only valid for ISO/IEC 14443A/MIFARE®
communication at 106 kbit/s.
0
ProtocolErr Set to logic 1, if one out of the following cases occur:
• Set to logic 1 if the SOF is incorrect. It is cleared automatically at
receiver start-up phase. The bit is only valid for 106 kbit/s.
• During the MFAuthent Command, bit ProtocolErr is set to logic 1,
if the number of bytes received in one data stream is incorrect.
[1] Command execution will clear all error bits except for bit TempErr. A setting by software is impossible.
112132
Product data sheet
Rev. 3.2 — 22 May 2007
© NXP B.V. 2007. All rights reserved.
18 of 109
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