ISL59446 데이터 시트보기 (PDF) - Renesas Electronics
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ISL59446 Datasheet PDF : 14 Pages
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ISL59446
AC Test Circuits
VIN
50
or
75
ISL59446
LCRIT
x2
*CL
1.1pF
RL
500or
150
VOUT
*CL Includes PCB trace capacitance
FIGURE 29A. TEST CIRCUIT WITH OPTIMAL OUTPUT LOAD
ISL59446 LCRIT
VIN
x2
50
or
RS
CL
CS
75
RL
500or
75
FIGURE 29B. INTER-STAGE APPLICATION CIRCUIT
VIN
50
ISL59446 LCRIT RS
x2
475
*CL
1.1pF
56.2
TEST
EQUIPMENT
50
*CL Includes PCB trace capacitance
FIGURE 29C. 500 TEST CIRCUIT WITH 50LOAD
ISL59446
VIN
LCRIT RS
x2
50or
75
*CL 118
2.1pF
86.6
TEST
EQUIPMENT
50
*CL Includes PCB trace capacitance
FIGURE 29D. 150 TEST CIRCUIT WITH 50LOAD
ISL59446
VIN
LCRIT RS
x2
50
or
50 or 75
*CL
75
2.1pF
TEST
EQUIPMENT
50 or 75
*CL Includes PCB trace capacitance
FIGURE 29E. BACKLOADED TEST CIRCUIT FOR 75 VIDEO CABLE
APPLICATION
AC Test Circuits
Figures 29C and 29D illustrate the optimum output load for
testing AC performance at 500 and 150 loads. Figure 29E
illustrates the optimum output load for 50 and 75
cable-driving.
Application Information
General
Key features of the ISL59446 include a fixed gain of 2, buffered
high impedance analog inputs and excellent AC performance at
output loads down to 150 for video cable-driving. The current
feedback output amplifiers are stable operating into capacitive
loads.
For the best isolation and crosstalk rejection, all GND pins and
NIC pins must connect to the GND plane.
AC Design Considerations
High speed current-feed amplifiers are sensitive to capacitance
at the inverting input and output terminals. The ISL59446 has an
internally set gain of 2, so the inverting input is not accessible.
Capacitance at the output terminal increases gain peaking
(Figure 2) and pulse overshoot (Figures 20 and 21). The AC
response of the ISL59446 is optimized for a total output
capacitance of up to 2.1pF over the load range of 150 to 500
When PCB trace capacitance and component capacitance
exceed 2pF, pulse overshoot becomes strongly dependent on the
input pulse amplitude and slew rate. This effect is shown in
Figures 20 and 21, which show approximate pulse overshoot as
a function of input slew rate and output capacitance. Fast pulse
rise and fall times (<150ns) at input amplitudes above 0.2V,
cause the input pulse slew rate to exceed the 1600V/µs output
slew rate of the ISL59446. At 125ps rise time, pulse input
amplitudes >0.2V cause slew rate limit operation. Increasing
levels of output capacitance reduce stability resulting in
increased overshoot, and settling time.
PC board trace length should be kept to a minimum in order to
minimize output capacitance and prevent the need for controlled
impedance lines. At 500MHz trace lengths approaching 1” begin
exhibiting transmission line behavior and may cause excessive
ringing if controlled impedance traces are not used. Figure 29A
shows the optimum interstage circuit when the total output trace
length is less than the critical length of the highest signal
frequency.
For applications where pulse response is critical and where
interstage distances exceed LCRIT, the circuit shown in
Figure 29B is recommended. Resistor RS constrains the
capacitance seen by the amplifier output to the trace
capacitance from the output pin to the resistor. Therefore, RS
should be placed as close to the ISL59446 output pin as
possible. For interstage distances much greater than LCRIT, the
back-loaded circuit shown in Figure 29E should be used with
controlled impedance PCB lines, with RS and RL equal to the
controlled impedance.
For applications where interstage distances are long, but pulse
response is not critical, capacitor CS can be added to low values
of RS to form a low-pass filter to dampen pulse overshoot. This
approach avoids the need for the large gain correction required
by the -6dB attenuation of the back-loaded controlled impedance
interconnect. Load resistor RL is still required but can be 500 or
greater, resulting in a much smaller attenuation factor.
FN6261 Rev 3.00
July 31, 2014
Page 11 of 14
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