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ISL59448 데이터 시트보기 (PDF) - Renesas Electronics
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ISL59448
500MHz Triple 2:1 Gain-of-2, Multiplexing Amplifier
Renesas Electronics
ISL59448 Datasheet PDF : 14 Pages
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ISL59448
Pinout
ISL59448
(24 LD QSOP)
TOP VIEW
IN0A 1
24 NIC
GND A 2
23 LE
IN0B 3
22 ENABLE
NIC 4
GND B 5
21 HIZ
x2
20 OUTA
IN0C 6
19 V+
NIC 7
x2
18 OUTB
IN1A 8
17 OUTC
NIC 9
IN1B 10
x2
16 V-
15 NIC
GND C 11
14 S0
IN1C 12
13 NIC
LATCHED ON HIGH LE
NIC = NO INTERNAL CONNECTION
Functional Diagram (each channel)
S0
EN0
D
L
Q
DECODE
EN1
C
IN0(A,B,C)
D
L
Q
IN1(A,B,C)
-
+
C
AMPLIFIER BIAS
LE
HIZ
ENABLE
A logic high on LE will latch the last S0 state.
This logic state is preserved when cycling HIZ
or ENABLE functions.
OUT
FN6160 Rev 2.00
March 29, 2006
Page 2 of 14
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