LTC1142(RevC) 데이터 시트보기 (PDF) - Linear Technology
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LTC1142 Datasheet PDF : 20 Pages
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LTC1142/LTC1142L/LTC1142HV
UU W U
APPLICATIO S I FOR ATIO
dead-time, which could cost as much as 1% in efficiency
(although there are no other harmful effects if D1 and D2
are omitted). Therefore, D1 and D2 should be selected for
a forward voltage of less than 0.6V when conducting IMAX.
CIN and COUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle VOUT/ VIN. To
prevent large voltage transients, a low ESR input capaci-
tor sized for the maximum RMS current must be used. The
maximum RMS capacitor current is given by:
[ ( )]1/2
VOUT VIN − VOUT
CIN Required IRMS ≈ IMAX
VIN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst case conditon is com-
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may also be
paralleled to meet size or height requirements in the
design. Always consult the manufacturer if there is any
question. An additional 0.1µF to 1µF ceramic capacitor is
also required on each VIN line (Pins 10 and 24) for high
frequency decoupling.
The selection of COUT is driven by the required Effective
Series Resistance (ESR). The ESR of COUT must be less
than twice the value of RSENSE for proper operation of the
LTC1142:
COUT Required ESR < 2RSENSE
Optimum efficiency is obtained by making the ESR equal
to RSENSE. As the ESR is increased up to 2RSENSE, the
efficiency degrades by less than 1%. If the ESR is greater
than 2RSENSE, the voltage ripple on the output capacitor
will prematurely trigger Burst Modeoperation, resulting in
disruption of continuous mode and an efficiency hit which
can be several percent.
Manufacturers such as Nichicon and United Chemicon
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
from Sanyo has the lowest ESR/size ratio of any alumi-
num electrolytic at a somewhat higher price. Once the
ESR requirement for COUT has been met, the RMS current
rating generally far exceeds the IRIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be parallel to meet the capacitance, ESR or RMS
current handling requirements of the application. Alumi-
num electrolytic and dry tantalum capacitors are both
available in surface mount configurations. In the case of
tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice
is the AVX TPS series of surface mount tantalums,
available in case heights ranging from 2mm to 4mm. For
example, if 200µF/10V is called for in an application
requiring 3mm height, two AVX 100µF/10V (P/N TPSD
107K010) could be used. Consult the manufacturer for
other specific recommendations.
At low supply voltages, a minimum capacitance at COUT is
needed to prevent an abnormal low frequency operating
mode (see Figure 4). When COUT is made too small, the
output ripple at low frequencies will be large enough to
trip the voltage comparator. This causes Burst Mode
operation to be activated when the LTC1142 would nor-
mally be in continuous operation. The output remains in
regulation at all times.
1000
800
600
L = 50µH
RSENSE = 0.02Ω
L = 25µH
RSENSE = 0.02Ω
400
L = 50µH
200
RSENSE = 0.05Ω
0
0
1
2
3
4
5
VIN – VOUT VOLTAGE (V)
1142 F04
Figure 4. Minimum Value of COUT
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
12
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