EL5111T 데이터 시트보기 (PDF) - Renesas Electronics

부품명

상세내역

제조사

EL5111T

60MHz Rail-to-Rail Input-Output Operational Amplifier

Renesas Electronics 

EL5111T

Driving Capacitive Loads

As load capacitance increases, the -3dB bandwidth will

decrease and peaking can occur. Depending on the

application, it may be necessary to reduce peaking and

to improve device stability. To improve device stability a

snubber circuit or a series resistor may be added to the

output of the EL5111T.

A snubber is a shunt load consisting of a resistor in series

with a capacitor. An optimized snubber can improve the

phase margin and the stability of the EL5111T. The

advantage of a snubber circuit is that it does not draw

any DC load current or reduce the gain.

Another method to reduce peaking is to add a series

output resistor (typically between 1 to 10). Depending

on the capacitive loading, a small value resistor may be

the most appropriate choice to minimize any reduction in

gain.

Power Dissipation

With the high-output drive capability of the EL5111T

amplifier, it is possible to exceed the +150°C absolute

maximum junction temperature under certain load

current conditions. It is important to calculate the

maximum power dissipation of the EL5111T in the

application. Proper load conditions will ensure that the

EL5111T junction temperature stays within a safe

operating region.

The maximum power dissipation allowed in a package is

determined according to Equation 1:

PDMAX

=

T----J---M-----A----X-----–-----T----A---M-----A----X--

JA

(EQ. 1)

where:

• TJMAX = Maximum junction temperature

• TAMAX = Maximum ambient temperature

• JA = Thermal resistance of the package

• PDMAX = Maximum power dissipation allowed

The total power dissipation produced by an IC is the total

quiescent supply current times the total power supply

voltage, plus the power dissipation in the IC due to the

load, or:

PDMAX = VS  ISMAX + VS+ – VOUT   ILOAD

(EQ. 2)

when sourcing, and:

PDMAX = VS  ISMAX + VOUT – VS-   ILOAD

(EQ. 3)

when sinking,

where:

• VS = Total supply voltage (VS+ - VS-)

• VS+ = Positive supply voltage

• VS- = Negative supply voltage

• ISMAX = Maximum supply current

(ISMAX = EL5111T quiescent current)

• VOUT = Output voltage

• ILOAD = Load current

Device overheating can be avoided by calculating the

minimum resistive load condition, RLOAD, resulting in

the highest power dissipation. To find RLOAD set the two

PDMAX equations equal to each other and solve for

VOUT/ILOAD. Reference the package power dissipation

curves, Figures 32 and 33, for further information.

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

0.6

0.5

417mW

0.4

0.3

TSOT5

JA = +300°C/W

0.2

0.1

0.0

0

25

50

75 85 100

125

AMBIENT TEMPERATURE (°C)

FIGURE 32. PACKAGE POWER DISSIPATION vs

AMBIENT TEMPERATURE

150

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY (4-LAYER) TEST BOARD - EXPOSED

DIEPAD SOLDERED TO PCB PER JESD51-5

0.8

581mW

0.6

0.4

TSOT5

JA = +215°C/W

0.2

0.0 0

25

50

7585 100

125

150

AMBIENT TEMPERATURE (°C)

FIGURE 33. PACKAGE POWER DISSIPATION vs

AMBIENT TEMPERATURE

FN6894 Rev 0.00

May 27, 2010

Page 12 of 14

Share Link: