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EL5111T 데이터 시트보기 (PDF) - Renesas Electronics

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EL5111T Datasheet PDF : 14 Pages
First Prev 11 12 13 14
EL5111T
TSOT Package Family
e1
D
A
N
6
4
E1
23
0.15 C D
2X
1
2
5
e
(N/2)
E
0.25 C
2X N/2 TIPS
B
b
NX
ddd M C A-B D
0.15 C A-B
2X
C
SEATING
PLANE
0.10 C
NX
(L1)
13
D
A2
A1
H
MDP0049
TSOT PACKAGE FAMILY
MILLIMETERS
SYMBOL TSOT5 TSOT6 TSOT8 TOLERANCE
A
1.00
1.00
1.00
Max
A1
0.05
0.05
0.05
±0.05
A2
0.87
0.87
0.87
±0.03
b
0.38
0.38
0.29
±0.07
c
0.127
0.127
0.127 +0.07/-0.007
D
2.90
2.90
2.90
Basic
E
2.80
2.80
2.80
Basic
E1
1.60
1.60
1.60
Basic
e
0.95
0.95
0.65
Basic
e1
1.90
1.90
1.95
Basic
L
0.40
0.40
0.40
±0.10
L1
0.60
0.60
0.60
Reference
ddd
0.20
0.20
0.13
-
N
5
6
8
Reference
NOTES:
Rev. B 2/07
1. Plastic or metal protrusions of 0.15mm maximum per side are
not included.
2. Plastic interlead protrusions of 0.15mm maximum per side are
not included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Index area - Pin #1 I.D. will be located within the indicated zone
(TSOT6 AND TSOT8 only).
6. TSOT5 version has no center lead (shown as a dashed line).
A
c
GAUGE
PLANE
0.25
L
4° ±4°
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Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
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For information regarding Intersil Corporation and its products, see www.intersil.com
FN6894 Rev 0.00
May 27, 2010
Page 14 of 14

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