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MAX820(1998) 데이터 시트보기 (PDF) - Maxim Integrated

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MAX820 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
Microprocessor and Non-Volatile
Memory Supervisory Circuits
REGULATOR
R3
VCC
RESET IN/INT
RESET 2
TO µP
R1
R4
MAX792
MAX820
LLIN/REFOUT
RESET 1
TO µP
R2
( ) VLOW LINE = 1.3 R1 + R2
R2
( ) VRESET = 1.3 R3 + R4
R4
LOW LINE 10
GND
TO µP NMI
Figure 4c. Alternative Connection for External Programming Mode
Reset Outputs (RESET and RESET)
The RESET output is active low and typically sinks 1.6mA
at 0.1V. When deasserted, RESET sources 1.6mA at typi-
cally VCC - 1.5V. The RESET output is the inverse of
RESET. RESET is guaranteed to be valid down to VCC = 1V,
and an external 10kpull-down resistor on RESET
ensures that it will be valid with VCC down to GND
(Figure 5). As VCC goes below 1V, the gate drive to the
RESET output switch reduces accordingly, increasing the
rDS(ON) and the saturation voltage. The 10kpull-down
resistor ensures that the parallel combination of switch
plus resistor will be around 10kand the saturation
voltage will be below 0.4V while sinking 40µA. When
using an external pull-down resistor of 10k, the high
state for the RESET output with VCC = 4.75V is typically
4.60V.
Overvoltage Comparator
The overvoltage comparator is an uncommitted com-
parator that has no effect on the operation of other chip
functions. Use this input to provide overvoltage indica-
tion by connecting a voltage divider from the input sup-
ply, as in Figure 6.
Connect OVI to ground if the overvoltage function is not
used. OVO goes low when OVI goes above 1.30V. With
OVI below 1.30V, OVO is actively pulled to VCC and can
source1µA.
1
RESET
MAX792
MAX820
TO µP RESET
10k
Figure 5. Adding an external pull-down resistor ensures RESET
is valid with VCC down to GND.
VOLTAGE REGULATOR
3
VCC
7 OVI
MAX792
MAX820
OVO 6
OVERVOLTAGE
1.30V
GND
12
Figure 6. Detecting an Overvoltage Condition
Watchdog Function
The watchdog monitors µP activity via the watchdog
input (WDI). If the µP becomes inactive, WDO and WDPO
are asserted. To use the watchdog function, connect
WDI to a µP bus line or I/O line. If WDI remains high or
low for longer than the watchdog timeout period
(1.6sec nominal), WDPO and WDO are asserted, indicat-
ing a software fault condition (see Watchdog-Pulse
Output and Watchdog Output sections).
Watchdog Input
If the watchdog function is unused, connect WDI to VCC
or GND. A change of state (high-to-low, low-to-high, or
a minimum 100ns pulse) at WDI during the watchdog
period resets the watchdog timer. The watchdog timer
______________________________________________________________________________________ 11

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