VRS1000 데이터 시트보기 (PDF) - Unspecified
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VRS1000 Datasheet PDF : 47 Pages
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VRS1000
VERSA
Datasheet Rev 1.6
Timers
The VRS1000 includes three 16-bit timers: T0, T1 and
T2.
The timers can operate in two specific modes:
o Event counting mode
o Timer mode
When operating in event counting mode, the counter is
incremented each time an external event, such as a
transition in the logical state of the timer input (T0, T1,
T2 input), is detected. When operating in timer mode,
the counter is incremented by the microcontroller’s
direct clock pulse or by a divided version of this pulse.
Timer 0 and Timer 1
Timers 0 and 1 have four modes of operation. These
modes allow the user to change the size of the
counting register or to authorize an automatic reload
when provided with a specific value. Timer 1 can even
be used as a baud rate generator to generate
communication frequencies for the serial interface.
Timer 1 and Timer 0 are configured by the TMOD and
TCON registers.
TABLE 20: TIMER MODE CONTROL REGISTER (TMOD) – SFR 89H
7
6
5
4
3
2
GATE C/T M1 M0 GATE C/T
1
M1.0
0
M0.0
Bit Mnemonic Description
7 GATE1
1: Enables external gate control (pin INT1 for
Counter 1). When INT1 is high, and TRx bit is
set (see TCON register), a counter is
incremented every falling edge on the T1IN
input pin.
6 C/T1
Selects timer or counter operation (Timer 1).
1 = A counter operation is performed
0 = The corresponding register will function
as a timer.
5 M1.1
Selects mode for Timer/Counter 1
4 M0.1
Selects mode for Timer/Counter 1
3 GATE0
If set, enables external gate control (pin INT0
for Counter 0). When INT0 is high, and TRx
bit is set (see TCON register), a counter is
incremented every falling edge on the T0IN
input pin.
2 C/T0
Selects timer or counter operation (Timer 0).
1 = A counter operation is performed
0 = The corresponding register will function
as a timer.
1 M1.0
Selects mode for Timer/Counter 0.
0 M0.0
Selects mode for Timer/Counter 0.
The table below summarizes the four modes of
operation of timers 0 and 1. The timer operating mode
is selected by the bits M1 and M0 of the TMOD
register.
TABLE 21: TIMER/COUNTER MODE DESCRIPTION SUMMARY
M1 M0 Mode
0
0
Mode 0
0
1
Mode 1
1
0
Mode 2
1
1
Mode 3
Function
13-bit Counter
16-bit Counter
8-bit auto-reload Counter/Timer. The reload
value is kept in TH0 or TH1, while TL0 or TL1
is incremented every machine cycle. When TLx
overflows, the value of THx is copied to TLx.
If Timer 1 M1 and M0 bits are set to 1, Timer 1
stops.
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