VRS1000 데이터 시트보기 (PDF) - Unspecified
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VRS1000 Datasheet PDF : 47 Pages
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VRS1000
VERSA
Datasheet Rev 1.6
The possible combinations of control bits that may be
used for the mode selection of Timer 2 are shown
below:
TABLE 24: TIMER 2 MODE SELECTION BITS
RCLK + TCLK CP/RL2
0
0
0
1
1
X
X
X
TR2
1
1
1
0
MODE
16-bit Auto-
Reload Mode
16-bit Capture
Mode
Baud Rate
Generator Mode
Off
The details of each mode are described below.
Timer 2 Capture Mode
In Capture Mode the EXEN2 bit value defines if the
external transition on the T2EX pin will be able to
trigger the capture of the timer value.
When EXEN2 = 0, Timer 2 acts as a 16-bit timer or
counter, which, upon overflowing, will set bit TF2
(Timer 2 overflow bit). This overflow can be used to
generate an interrupt.
FIGURE 15: TIMER 2 IN CAPTURE MODE
FO SC
T2 Pin
T2 EX Pin
÷12
0
C/T 2
1
TI MER
COUNTER
TR2
0
TL2
70
T H2
7
0
RCAP2L 7 0
RCAP2H 7
TF2
EXF2
EXEN2
Timer 2
Interrupt
When EXEN2 = 1, the above still applies. In addition, it
is possible to allow a 1 to 0 transition at the T2EX input
to cause the current value stored in the Timer 2
registers (TL2 and TH2) to be captured into the
RCAP2L and RCAP2H registers. Furthermore, the
transition at T2EX causes bit EXF2 in T2CON to be
set, and EXF2, like TF2, can generate an interrupt.
Note that both EXF2 and TF2 share the same interrupt
vector.
Timer 2 Auto-Reload Mode
In this mode, there are also two options. The user may
choose either option by writing to bit EXEN2 in
T2CON.
If EXEN2 = 0, when Timer 2 rolls over, it not only sets
TF2, but also causes the Timer 2 registers to be
reloaded with the 16-bit value in the RCAP2L and
RCAP2H registers previously initialised. In this mode,
Timer 2 can be used as a baud rate generator source
for the serial port.
If EXEN2=1, then Timer 2 still performs the above
operation, but a 1 to 0 transition at the external T2EX
input will also trigger an anticipated reload of the Timer
2 with the value stored in RCAP2L, RCAP2H and set
EXF2.
FIGURE 16: TIMER 2 IN AUTO-RELOAD MODE
FOSC
T2 Pin
T2 E X Pin
÷1 2
0
TIMER
C/T2
1 CO UNTER
TR2
EXEN2
0
TL 2
70
TH2
7
0
RCAP2L 7 0
RCAP2H 7
TF2
EXF2
Timer 2
Int errupt
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