HY27SS(08/16)561M 데이터 시트보기 (PDF) - Hynix Semiconductor

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HY27SS(08/16)561M

256Mbit (32Mx8bit / 16Mx16bit) NAND Flash Memory

Hynix Semiconductor 

HY27SS(08/16)561M Series

HY27US(08/16)561M Series

256Mbit (32Mx8bit / 16Mx16bit) NAND Flash

Table 2. Bus Operation

BUS Operation

Command Input

Address Input

Data Input

Data Output

Write Protect

Standby

CE

ALE

CLE

RE

WE

WP

VIL

VIL

VIH

VIH

Rising

X(2)

VIL

VIH

VIL

VIH

Rising

X

VIL

VIL

VIL

VIH

Rising

X

VIL

VIL

VIL

Falling

VIH

X

X

X

X

X

X

VIL

VIH

X

X

X

X

X

Note : (1) Only for x16 devices.

(2) WP must be VIH when issing a program or erase command.

Table 3: Address Insertion, x8 Devices

Bus Cycle

1st Cycle

2nd Cycle

3rd Cycle

I/O7

A7

A16

A24

I/O6

A6

A15

A23

I/O5

A5

A14

A22

I/O4

A4

A13

A21

I/O3

A3

A12

A20

I/O0 - I/O7

Command

Address

Data Input

Data Output

X

X

I/O8 - I/O15(1)

X

X

Data Input

Data Output

X

X

I/O2

A2

A11

A19

I/O1

A1

A10

A18

I/O0

A0

A9

A17

Note: (1). A8 is set Low or High by the 00h or 01h Command, see Pointer Operations section.

(2). Any additional input cycles will be ignored with tALS > 0ns.

Table4: Address Insertion, x16 Devices

Bus Cycle

1st Cycle

2nd Cycle

3rd Cycle

I/O8-IO15

L(1)

L(1)

L(1)

I/O7

A7

A16

A24

I/O6

A6

A15

A23

I/O5

A5

A14

A22

I/O4

A4

A13

A21

Note: (1). L must be set ''LOW''.

(2). A8 is Don't Care in x16 devices.

(3). Any additional input cycles will be ignored with tALS > 0ns.

(4). A1 is the Least Significant Address for x16 devices.

(5). The 01h Command is not used in x16 devices.

I/O3

A3

A12

A20

I/O2

A2

A11

A19

I/O1

A1

A10

A18

I/O0

A0

A9

A17

Rev 0.7 / Oct. 2004

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