DJLXT971ALC.A4 데이터 시트보기 (PDF) - Intel

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DJLXT971ALC.A4

3.3V Dual-Speed Fast Ethernet PHY Transceiver

Intel 

LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver

1.0

Pin Assignments

Figure 2. LXT971A 64-Ball PBGA Assignments

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2

3

4

5

6

7

8

A MDINT CRS TXD3 TXD0 RX_ER VCCD RX_DV RXD0 A

B

REF

CLK/XI

COL

TXD2 TX_EN TX_ER

RX_

CLK

N/C RXD1 B

C XO

RESET GND

TXD1

TX_

CLK

GND

N/C

RXD2 C

D

Tx

SLEW0

Tx

SLEW1

MDDIS

GND

VCCIO

RXD3

N/C

MDIO D

E ADDR0 ADDR1 GND

GND

VCCIO

LED/

CFG1

MDC

PWR

DWN

E

F ADDR3 ADDR2 GND GND

TDI

TMS

LED/

CFG2

LED/

CFG3

F

G ADDR4 SD/TP VCCA VCCA TDO TCK GND GND G

H RBIAS TPFOP TPFON TPFIP TPFIN TRST SLEEP PAUSE H

1

2

3

4

5

6

7

8

12

Datasheet

Document #: 249414

Revision #: 002

Rev. Date: August 7, 2002

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