DJLXT971ALC.A4 데이터 시트보기 (PDF) - Intel

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DJLXT971ALC.A4

3.3V Dual-Speed Fast Ethernet PHY Transceiver

Intel 

LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver

Table 5. LXT971A Power Supply Signal Descriptions

PBGA

Pin#

A6

D4, E3

E4, F3

F4, C6,

C3, G7,

G8

LQFP

Pin#

51

Symbol

VCCD

7, 11, 18,

25, 34,

35, 41,

50, 61

GND

E5, D5 8, 40

VCCIO

G3, G4 21, 22 VCCA

Type

Signal Description

–

Digital Power. Requires a 3.3V power supply.

–

Ground.

MII Power. Requires either a 3.3V or a 2.5V supply. Must

–

be supplied from the same source used to power the MAC

on the other side of the MII.

–

Analog Power. Requires a 3.3V power supply.

Table 6. LXT971A JTAG Test Signal Descriptions

PBGA

Pin#

LQFP

Pin#

Symbol

Type1

Signal Description

F5

27 TDI2

I

Test Data Input. Test data sampled with respect to the

rising edge of TCK.

G5

28 TDO2

F6

29 TMS2

G6

30 TCK2

H6

31 TRST2

O

Test Data Output. Test data driven with respect to the

falling edge of TCK.

I

Test Mode Select.

I

Test Clock. Test clock input sourced by ATE.

I

Test Reset. Test reset input sourced by ATE.

1. Type Column Coding: I = Input, O = Output, A = Analog, OD = Open Drain.

2. If JTAG port is not used, these pins do not need to be terminated.

Table 7. LXT971A LED Signal Descriptions

PBGA

Pin#

LQFP

Pin#

Symbol

Type1

Signal Description

LED Drivers 1-3. These pins drive LED indicators. Each

E6

38

LED/CFG1

LED can display one of several available status

conditions as selected by the LED Configuration Register

F7

37

LED/CFG2

I/O (refer to Table 56 on page 85 for details).

F8

36

LED/CFG3

Configuration Inputs 1-3. These pins also provide initial

configuration settings (refer to Table 9 on page 30 for

details).

1. Type Column Coding: I = Input, O = Output, A = Analog, OD = Open Drain.

2. Pull-up/pull-down resistors of 10 k can be implemented if LEDs are used in the design.

Datasheet

19

Document #: 249414

Revision #: 002

Rev. Date: August 7, 2002

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