M41T56(2006) 데이터 시트보기 (PDF) - STMicroelectronics

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M41T56
(Rev.:2006)

Serial real-time clock with 56 bytes NVRAM

STMicroelectronics 

M41T56

Operation

Table 2.

Symbol

AC characteristics

Parameter(1)

Min

Max

Unit

fSCL

tLOW

tHIGH

tR

tF

tHD:STA

SCL clock frequency

Clock low period

Clock high period

SDA and SCL rise time

SDA and SCL fall time

START condition hold time

(after this period the first clock pulse is generated)

0

100

kHz

4.7

µs

4

µs

1

µs

300

ns

4

µs

START condition setup time

tSU:STA (only relevant for a repeated start condition)

4.7

µs

tSU:DAT Data setup time

tHD:DAT(2) Data hold time

250

ns

0

µs

tSU:STO STOP condition setup time

4.7

µs

tBUF

Time the bus must be free before a new transmission

can start

4.7

µs

1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5V (except where noted).

2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max.) of the falling

edge of SCL.

2.2

READ mode

In this mode, the master reads the M41T56 slave after setting the slave address (see

Figure 8 on page 12 and Figure 9 on page 12). Following the WRITE Mode Control Bit (R/W

= 0) and the Acknowledge Bit, the word address An is written to the on-chip address pointer.

Next the START condition and slave address are repeated, followed by the READ Mode

Control Bit (R/W = 1). At this point, the master transmitter becomes the master receiver. The

data byte which was addressed will be transmitted and the master receiver will send an

Acknowledge Bit to the slave transmitter. The address pointer is only incremented on

reception of an Acknowledge Bit. The M41T56 slave transmitter will now place the data byte

at address An + 1 on the bus. The master receiver reads and acknowledges the new byte

and the address pointer is incremented to An + 2. This cycle of reading consecutive

addresses will continue until the master receiver sends a STOP condition to the slave

transmitter.

An alternate READ mode may also be implemented, whereby the master reads the M41T56

slave without first writing to the (volatile) address pointer. The first address that is read is the

last one stored in the pointer, see Figure 10 on page 12.

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