LH28F800SU 데이터 시트보기 (PDF) - Sharp Electronics

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LH28F800SU

8M (512K × 16, 1M × 8) Flash Memory

Sharp Electronics 

LH28F800SU

8M (512K × 16, 1M × 8) Flash Memory

DEEP

POWER-DOWN

ADDRESSES (A) VIH

(NOTE 1)

VIL

WRITE

DATA-WRITE

OR ERASE

SETUP COMMAND

WRITE VALID

ADDRESS AND DATA

(DATA-WRITE) OR

ERASE CONFIRM

COMMAND

AUTOMATED

DATA-WRITE

OR ERASE

DELAY

AIN

tAVAV

tAVEH

tEHAX

ADDRESSES (A) VIH

(NOTE 2)

VIL

tAVAV

AIN

tAVEH tEHAX

WRITE READ

EXTENDED

REGISTER

COMMAND

(NOTE 3)

READ

EXTENDED

STATUS

REGISTER DATA

A = RA

READ

COMPATIBLE

STATUS

REGISTER DATA

WE (W) VIH

VIL

OE (G) VIH

VIL

CEX (E) VIH

(NOTE 4) VIL

tEHWH

tWLEL

tEHEL

tELEH

tEHDX

tEHGL

tEHQV1, 2

tGHEL

DATA (D/Q) VIH

VIL

HIGH-Z

tPHEL

tDVEH

DIN

DIN

tEHRL

RY/BY (R) VOH

VOL

DIN

DOUT

DIN

tRHPL

RP (P)

VIH

VIL

tVPEH

(NOTE 5)

tQVVL

VPP

(V)

VPPH

VPPL

NOTES:

1. This address string depicts Data-Write/Erase cycles with corresponding verification via ESRD.

2. This address string depicts Data-Write/Erase cycles with corresponding verification via CSRD.

3. This cycle is invalid when using CSRD for verification during Data-Write/Erase operations.

4. CEX is defined as the latter of CE0 or CE1 going LOW or the first of CE0 or CE1 going HIGH.

5. RP low transition is only to show tRHPL; not valid for above Read and Write cycles.

Figure 16. Alternate AC Waveforms for Command Write Operations

28F800SUR-14

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