S3C24A0A 데이터 시트보기 (PDF) - Samsung

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S3C24A0A

32-BIT RISC MICROPROCESSOR

Samsung 

Table of Contents (Continued)

Chapter 25 MPEG-4 DCTQ

Overview ....................................................................................................................................................... 25-1

Features ............................................................................................................................................... 25-2

Timing Diagram.................................................................................................................................... 25-2

Separated Clock Domain ..................................................................................................................... 25-3

DCT...................................................................................................................................................... 25-3

IDCT..................................................................................................................................................... 25-3

Quantisation ......................................................................................................................................... 25-4

DEQuantisation .................................................................................................................................... 25-4

Frame Memory Map............................................................................................................................. 25-5

Q-Information ....................................................................................................................................... 25-6

Bit Format............................................................................................................................................. 25-7

Transposed Coefficeint Output ............................................................................................................ 25-8

Software Interface......................................................................................................................................... 25-8

MPEG-4 DCTQ Special Registers................................................................................................................ 25-9

Current Frame Y Start Address Register............................................................................................. 25-9

Current Frame Cb Start Address Register........................................................................................... 25-9

Current Frame Cr Start Address Register ........................................................................................... 25-9

Reference Frame Y Start Address Register ........................................................................................ 25-10

Reference Frame Cb Start Address Register...................................................................................... 25-10

Reference Frame Cr Start Address Register....................................................................................... 25-10

Dctqed Frame Y Start Address Register ............................................................................................. 25-10

Dctqed Frame Cb Start Address Register ........................................................................................... 25-11

Dctqed Frame Cr Start Address Register ............................................................................................ 25-11

Quantisation Factor Start Address Register ........................................................................................ 25-11

Image Size Register............................................................................................................................. 25-11

SHQ Register ....................................................................................................................................... 25-12

Control Register ................................................................................................................................... 25-13

Chapter 26 VLX

Overview ....................................................................................................................................................... 26-1

Feature................................................................................................................................................. 26-1

MPEG-4 VLX (Variable Length Coding, Decoding) Operation..................................................................... 26-2

MPEG-4 VLX (Variable Length Coding, Decoding) Operation..................................................................... 26-2

VLC ...................................................................................................................................................... 26-2

Entropy Coder ...................................................................................................................................... 26-4

VLD ...................................................................................................................................................... 26-6

VLX (VLC and VLD) Special Registers ........................................................................................................ 26-10

VLX Common SFR .............................................................................................................................. 26-10

Frame Start Addr.................................................................................................................................. 26-11

VLX Control Register (VLX_CON)....................................................................................................... 26-12

VLD Control Register (VLD_CON) ...................................................................................................... 26-13

VLX Output Register 1 (VLX_CON 1) – Read Only ............................................................................ 26-14

VLX Output Register 2 (VLX_CON 2) – Read Only ............................................................................ 26-14

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S3C24A0A MICROPROCESSOR

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