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LC662508A 데이터 시트보기 (PDF) - SANYO -> Panasonic

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LC662508A Datasheet PDF : 17 Pages
First Prev 11 12 13 14 15 16 17
LC662508A, 662512A, 662516A
Continued from preceding page.
ROM area
3FFEH
3FFFH
Bit
Option specified
7
6
5
4
Reserved. Must be set to predefined data values.
3
2
1
0
7
6
5
4
Reserved. Must be set to predefined data values.
3
2
1
0
Option/data relationship
This data is generated by the assembler.
If the assembler is not used, set this data to 00.
This data is generated by the assembler.
If the assembler is not used, set this data to 00.
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Maximum supply voltage
Input voltage
Output voltage
Output current per pin
Total pin current
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
Conditions
Ratings
Unit
Note
VDD max
VIN1
VDD
P2, P3 (except for the P33/HOLD pin),
P61, and P63
0.3 to +7.0
V
0.3 to +15.0
V
1
VIN2
VOUT1
All other inputs
P2, P3 (except for the P33/HOLD pin),
P61, P63, and PA
0.3 to VDD + 0.3
V
2
0.3 to +15.0
V
1
VOUT2 All other inputs
0.3 to VDD + 0.3
V
2
P0, P1, P2, P3 (except for the P33/HOLD pin),
ION1
P4, P5, P6, P7, P8, P9, PA, PB, PC, PD1, PD3
20
mA
3
ION2
IOP1
IOP2
P41, P43, PC3, PD1, PD3
P0, P1, P4, P5, P7, PA, PB
P2, P3 (except for the P33/HOLD pin), P6, P8, P9,
and PC
20
mA
3
2
mA
4
4
mA
4
IOP3
Σ ION1
P41, P43, PC3, PD1, PD3
P0, P1, P2, P3 (except for the P33/HOLD pin), PB,
PC, and PD
10
mA
4
75
mA
3
Σ ION2
Σ IOP1
P4, P5, P6, P7, P8, P9, and PA
P0, P1, P2, P3 (except for the P33/HOLD pin), PB,
PC, and PD
75
mA
3
25
mA
4
Σ IOP2
Pd max
P4, P5, P6, P7, P8, P9, and PA
Ta = 30 to +70°C: DIP64S (QFP64E)
25
mA
4
600 (430) mW
5
Topr
30 to +70
°C
Tstg
55 to +125
°C
Note: 1. Applies to pins with open-drain output specifications. For pins with other than open-drain output specifications, the ratings in the pin column for that
pin apply.
2. For the oscillator input and output pins, levels up to the free-running oscillation level are allowed.
3. Sink current (Applies to P8 when the CMOS output specifications and applies to PD when the inverter array specifications are selected.)
4. Source current (Applies to all pins except P8 for which the pull-up output specifications, the CMOS output specifications, or the inverter array
specifications have been selected. Applies to PD pins for which the inverter array specifications have been selected.)
Contact your Sanyo representative for details on the electrical characteristics when the inverter array specifications option is selected.
5. We recommend the use of reflow soldering techniques to solder mount QFP packages.
Please consult with your Sanyo representative for details on process conditions if the package itself is to be directly immersed in a dip-soldering
bath (dip-soldering techniques).
No. 5997-12/17

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